| NSF Org: |
CCF Division of Computing and Communication Foundations |
| Recipient: |
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| Initial Amendment Date: | August 20, 2020 |
| Latest Amendment Date: | October 14, 2020 |
| Award Number: | 2041598 |
| Award Instrument: | Standard Grant |
| Program Manager: |
Sankar Basu
sabasu@nsf.gov (703)292-7843 CCF Division of Computing and Communication Foundations CSE Directorate for Computer and Information Science and Engineering |
| Start Date: | September 1, 2020 |
| End Date: | August 31, 2021 (Estimated) |
| Total Intended Award Amount: | $43,308.00 |
| Total Awarded Amount to Date: | $43,308.00 |
| Funds Obligated to Date: |
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| History of Investigator: |
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| Recipient Sponsored Research Office: |
940 GRACE HALL NOTRE DAME IN US 46556-5708 (574)631-7432 |
| Sponsor Congressional District: |
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| Primary Place of Performance: |
IN US 46556-5708 |
| Primary Place of
Performance Congressional District: |
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| Unique Entity Identifier (UEI): |
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| Parent UEI: |
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| NSF Program(s): | Software & Hardware Foundation |
| Primary Program Source: |
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| Program Reference Code(s): |
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| Program Element Code(s): |
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| Award Agency Code: | 4900 |
| Fund Agency Code: | 4900 |
| Assistance Listing Number(s): | 47.070 |
ABSTRACT
Electronic design automation (EDA) is a key enabling technology for the advances in information processing that we are enjoying today. EDA has provided fundamental design principles and tools empowering the exponential increase of the number of transistors on an integrated circuit chip over the past 50 years. Without EDA, it would not have been possible for billion-transistor chips to be a reality! However, the field of EDA is facing some unique challenges. On one hand, physical limit of transistor scaling limits future exponential growth in transistor density. The exorbitant cost of integrated circuit fabrication and the excessive complexity of EDA tools make it difficult to bring design automation innovations to practice. On the other hand, the recent rise of machine learning and artificial intelligence applications and emerging architectures and technologies calls for more customized solutions to designing electronic systems. This project seeks to support a workshop, titled Challenges and Opportunities for Electronic Design Automation in the Next Decade, aims to assemble a diverse group of leading researchers, from both academia and industry in the field of EDA, to discuss strategies as well as tactics in tackling the challenges in EDA. The workshop organizers will make a concerted effort to invite women, minority and other underrepresented groups to participate the workshop. Some invited speakers and panelists will be from these groups. The workshop will address key issues related to curriculum design for training the next generation EDA researchers, development of special training programs for graduate and undergraduate students, and collaboration between academia and industry.
This project and the associated workshop will explore answers to overarching questions including but not limited to (i) what are the high-risk and high-return research topics, (ii) what other adjacent fields that EDA research should aggressively seek collaboration with, (iii) where the scientific findings should be disseminated in order to have the greatest impact given the interdisciplinary nature of EDA research, and (iv) where the research funding should come from and how it should be distributed to encourage more transformative research. A final report will be produced and disseminated in a premier journal in the EDA field.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
Design and design automation of micro-/nano-circuits and systems are key enablers in advancing information technologies which have so profoundly changed all our lives over the past six decades. Research in design and design automation has created fundamental design principles and tools fueling the exponential growth of the number of transistors on integrated circuit chips over the past 60 years. Without innovations in micro/nano circuits and systems design and automation, billion-transistor chips that form the foundations of today?s information age would not be a reality!
Moving forward, design and design automation of micro/nano circuits and systems face several challenges. On the one hand, business-as-usual approaches are plateauing. Traditional ways of improving silicon CMOS technologies or designing, verifying and testing integrated circuits and systems are approaching various limits: physical size, power and reliability limits as well as complexity limits. At the same time, our dependency on such systems continues to grow. On the other hand, the recent rise of machine learning and artificial intelligence applications coupled with recent advances in emerging nanotechnologies and NanoSystems creates tremendous opportunities to develop customized solutions for highly efficient and robust circuits and systems.
To identify key challenges and future research directions in the field of Micro/Nano Circuits and Systems Design and Design Automation for the next decade, with this project sponsored by the NSF, a (virtual) workshop was held on December 14-16, 2020. The workshop assembled over 200 researchers and leaders from academia, industry and government. The first two days of the workshop included 11 plenary talks and 3 panels covering the following five themes: (i) electronic design automation (EDA) tools and methodologies, (ii) foundational technologies and NanoSystems, (iii) artificial intelligence (AI) / machine learning (ML) / brain-inspired hardware design, and (iv) new application domains. On the last day, the workshop attendees were grouped into five roundtables on the above four themes as well as the fifth theme of physics-inspired hardware design.
The key outcome of the workshop is a full-length report that summarizes the views expressed by the attendees of the five roundtables as well as the plenary speakers and the panelists. The report first elucidates the background and rationale behind organizing the workshop. Detailed discussions on the current state and future directions/needs of research are presented on the five themes: Electronic Design Automation, Foundational Technologies and NanoSystems, ML/AI/Brain-Inspired Hardware Design, Physics-Inspired Hardware Design, and Application Domains beyond Circuits and Electronic Systems. The report ends with an extensive list of recommendations to the NSF. The report can be accessed at https://nsfedaworkshop.nd.edu/assets/432289/nsf20_eda_workshop_report.pdf.
Immediately following the workshop, on December 16, 2020, a (virtual) meeting was also organized to assess the academic needs for accessing semiconductor foundries and associated support infrastructure, and brainstorm ways to provide such access and support to US academic researchers. More than 50 invited representatives from the government, academia, industry, and foundry service providers attended the meeting. The output of the meeting is a report documenting the perspectives of the attendees. The report is available at https://nsfedaworkshop.nd.edu/assets/429148/nsf20_foundry_meeting_report.pdf.
Last Modified: 11/28/2021
Modified by: Xiaobo S Hu
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