
NSF Org: |
CNS Division Of Computer and Network Systems |
Recipient: |
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Initial Amendment Date: | September 18, 2015 |
Latest Amendment Date: | September 18, 2015 |
Award Number: | 1535658 |
Award Instrument: | Standard Grant |
Program Manager: |
Dmitri Perkins
CNS Division Of Computer and Network Systems CSE Directorate for Computer and Information Science and Engineering |
Start Date: | October 1, 2015 |
End Date: | September 30, 2018 (Estimated) |
Total Intended Award Amount: | $99,999.00 |
Total Awarded Amount to Date: | $99,999.00 |
Funds Obligated to Date: |
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History of Investigator: |
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Recipient Sponsored Research Office: |
900 S NORMAL AVE CARBONDALE IL US 62901-4302 (618)453-4540 |
Sponsor Congressional District: |
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Primary Place of Performance: |
IL US 62901-4308 |
Primary Place of
Performance Congressional District: |
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Unique Entity Identifier (UEI): |
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Parent UEI: |
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NSF Program(s): | IUCRC-Indust-Univ Coop Res Ctr |
Primary Program Source: |
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Program Reference Code(s): |
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Program Element Code(s): |
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Award Agency Code: | 4900 |
Fund Agency Code: | 4900 |
Assistance Listing Number(s): | 47.070 |
ABSTRACT
This project will develop foundations for novel design of low-power and high-resolution image sensors, beyond the state-of-the-art. The potential outcome of this research is two orders of magnitude power reduction and ability to achieve real-time image reconstruction. The research activities have the potential to make significant impact on number of different industries. Image sensors have been used in extremely wide range of applications to directly enhance the quality of human life, including communication, entertainment, security, medical diagnosis and many others. The PI's will involve a number of graduate and undergraduate students from under-represented groups.
This project will systematically investigate the optimal designs of all major blocks used in image sensors. The project aims to develop novel design ideas for compressive sensing, resulting in potential order-of-magnitude improvements in trade-offs between energy use and performance. The research will be conducted within the I/UCRC Center for Embedded Systems and the project has Center's strong support, and active participation from its member companies, which will pave the way for the transition of the project outcomes into commercial products that will benefit society at large.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
Image sensors have become ubiquitous and profoundly enhanced various aspects of modern societies, including entertainment, communication, security, medical diagnosis, scientific research, etc. Many of these applications demand constant improvements on image sensor resolution and power efficiency. Also, the huge volume of the raw data generated by these image sensors poses stiff challenges on image data storage and analysis. Recently, compressive sensing (CS) techniques emerged as a promising method that can dramatically reduce both image sensor power consumption and its output data size. Motivated by these observations, this project aims to develop scalable and power-efficient circuits for CS image sensors.
The key outcomes of the project are summarized as follows. First, a novel CS measurement method for image sensors is developed, which can dramatically simplify CS image sensor implementation with enhanced power efficiency. The performance of the proposed method is compared with existing CS methods via simulation for 1000 benchmark images. The results demonstrate that the proposed method consistently outperforms the existing methods. Second, circuit techniques to implement the proposed CS measurement method are developed and verified via circuit simulation. The impacts of process variations and mismatches on the performance of the developed circuits are investigated and possible calibration methods are identified. Furthermore, techniques to optimize current-mode pixel cells of image sensors are developed in order to improve the linearity of pixel summations involved in CS measurement operation. The research also leads to a novel low-voltage time-assisted SAR (successive approximation register) ADC (analog to digital converter) circuit that can be used in CS image sensors. The SAR ADC circuit uses a novel circuit self-learning technique and uncertainty tolerant search algorithm to cope with various uncertainties associated with the time information exploited by the ADC circuit.
The research conducted in this project resulted in six publications and one US patent. One Ph. D. and two master students participated in the project. From the research experience, they gained in-depth knowledge and hands-on experience in the field of semiconductor, integrated circuits (IC), and image sensors.
Last Modified: 12/18/2018
Modified by: Haibo Wang
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