
NSF Org: |
CCF Division of Computing and Communication Foundations |
Recipient: |
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Initial Amendment Date: | January 21, 2015 |
Latest Amendment Date: | May 1, 2019 |
Award Number: | 1453378 |
Award Instrument: | Continuing Grant |
Program Manager: |
Sankar Basu
sabasu@nsf.gov (703)292-7843 CCF Division of Computing and Communication Foundations CSE Directorate for Computer and Information Science and Engineering |
Start Date: | March 1, 2015 |
End Date: | February 28, 2022 (Estimated) |
Total Intended Award Amount: | $453,036.00 |
Total Awarded Amount to Date: | $453,036.00 |
Funds Obligated to Date: |
FY 2017 = $89,390.00 FY 2018 = $97,064.00 FY 2019 = $93,565.00 |
History of Investigator: |
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Recipient Sponsored Research Office: |
341 PINE TREE RD ITHACA NY US 14850-2820 (607)255-5014 |
Sponsor Congressional District: |
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Primary Place of Performance: |
320 Rhodes Hall Ithaca NY US 14853-3801 |
Primary Place of
Performance Congressional District: |
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Unique Entity Identifier (UEI): |
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Parent UEI: |
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NSF Program(s): | Software & Hardware Foundation |
Primary Program Source: |
01001718DB NSF RESEARCH & RELATED ACTIVIT 01001819DB NSF RESEARCH & RELATED ACTIVIT 01001920DB NSF RESEARCH & RELATED ACTIVIT |
Program Reference Code(s): |
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Program Element Code(s): |
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Award Agency Code: | 4900 |
Fund Agency Code: | 4900 |
Assistance Listing Number(s): | 47.070 |
ABSTRACT
This CAREER research project aims to significantly improve the design productivity and quality of heterogeneous computer architectures, which extensively integrate specialized hardware accelerators to continue to provide the computing improvements essential to all aspects of our society. Achieving this goal requires the development of a new class of truly integrated design automation methodologies and tools to enable productive modeling, exploration, and generation of hardware accelerators from high-level programs, especially for the irregular programs that are commonplace in emerging application domains such as computer vision, machine learning, physical simulation, and social network analytics. The project also has a broad yet thematically focused plan for educational outreach, which aims to cultivate the next generation of engineers and scientists who can bridge the chasm between the software and hardware design paradigms. The PI will lead hands-on design sessions for underrepresented minority high school students and organize engineering seminars with engaging demonstrations for first-year undergraduates to increase their interest and participation in computer engineering. In addition, the PI will actively integrate the research outcomes into undergraduate and graduate curriculum development, and leverage industrial collaborations to effectively disseminate the research results on heterogeneous computing to a broader audience.
Diminished benefits of technology scaling have led to a growing interest in heterogeneous accelerator-rich system architectures to improve performance under tight power and energy efficiency constraints. Irregular programs are gaining prominence in many important application domains; but these programs are much more difficult to parallelize on conventional data-parallel accelerators such as GPUs, as they typically exhibit less-structured data access patterns and difficult-to-predict dynamic parallelism. This project aims to develop a synergistic design automation framework where a set of novel programming abstractions, architectural templates, synthesis optimization algorithms, and hardware prototypes all play concerted roles to overcome the many challenges raised by the irregular programs. Specifically, the key idea is to automatically generate softly synthesized accelerators that are capable of decoupling data access from computation for tolerating memory latency and performing run-time optimizations for exploiting the irregular parallelism.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
Diminished benefits of technology scaling have led to a growing interest in heterogeneous accelerator-rich system architectures to improve performance under tight power and energy efficiency constraints. In parallel, irregular programs are gaining prominence in many important application domains; however, these programs are much more difficult to parallelize on conventional data-parallel accelerators such as GPUs, as they typically exhibit less-structured data access patterns and difficult-to-predict dynamic parallelism. Overcoming the challenge of productively creating hardware accelerators for irregular programs will enable major advances in design automation for future heterogeneous computing with pervasive hardware specialization.
Given this motivation, the project took a synergistic approach and explored novel programming abstractions, architectural templates, synthesis optimization algorithms, and FPGA prototypes, which all played concerted roles to overcome the many challenges raised by the irregular programs. More specifically the PI and his research team designed, implemented, and evaluated a variety of novel specialized accelerators capable of efficiently executing various irregular workloads such as sparse linear algebra and graph processing. The research team also invented and evaluated several novel high-level synthesis (HLS) algorithms to enable automatically generating softly synthesized accelerators that are capable of decoupling data access from computation for tolerating memory latency. These studies have resulted in close to 20 publications in top conferences and journals in EDA, computer architecture, and FPGA. were put into practice using several hardware prototypes. In addition, several of the tools and benchmarks developed in this project have been released as open-source software projects.
As part of this project's educational outreach plan, the PI developed a new course targeted towards advanced undergraduate and first-year graduate students. This course focuses on high-level digital design automation and teaches students the algorithms and optimization techniques involved in automatically transforming software-based descriptions of algorithms into hardware descriptions. The PI also led a week-long design experience for high-school students as part of the CATALYST Academy. The CATALYST Academy is organized by the Office of Diversity Programming in Engineering at Cornell University, which focuses on young men and women of diverse racial, socioeconomic, and geographic backgrounds. CATALYST scholars spend their mornings learning about the various fields within engineering, and spend their afternoons working on the design project.
Last Modified: 06/23/2022
Modified by: Zhiru Zhang
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