| NSF Org: |
CCF Division of Computing and Communication Foundations |
| Recipient: |
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| Initial Amendment Date: | August 6, 2014 |
| Latest Amendment Date: | June 16, 2015 |
| Award Number: | 1438989 |
| Award Instrument: | Standard Grant |
| Program Manager: |
Yuanyuan Yang
CCF Division of Computing and Communication Foundations CSE Directorate for Computer and Information Science and Engineering |
| Start Date: | August 1, 2014 |
| End Date: | July 31, 2017 (Estimated) |
| Total Intended Award Amount: | $215,035.00 |
| Total Awarded Amount to Date: | $231,035.00 |
| Funds Obligated to Date: |
FY 2015 = $16,000.00 |
| History of Investigator: |
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| Recipient Sponsored Research Office: |
4000 CENTRAL FLORIDA BLVD ORLANDO FL US 32816-8005 (407)823-0387 |
| Sponsor Congressional District: |
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| Primary Place of Performance: |
4000 Central Florida Blvd Orlando FL US 32816-8005 |
| Primary Place of
Performance Congressional District: |
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| Unique Entity Identifier (UEI): |
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| Parent UEI: |
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| NSF Program(s): |
Software & Hardware Foundation, Exploiting Parallel&Scalabilty |
| Primary Program Source: |
01001516DB NSF RESEARCH & RELATED ACTIVIT |
| Program Reference Code(s): |
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| Program Element Code(s): |
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| Award Agency Code: | 4900 |
| Fund Agency Code: | 4900 |
| Assistance Listing Number(s): | 47.070 |
ABSTRACT
The transistor density of integrated circuits has been doubling approximately every two years for about four decades. This exponential rise in the computational power of the integrated circuit has driven the information technology revolution that has transformed every aspect of our society - from personal entertainment devices to high-assurance intelligent cyber-physical systems. However, the growth in transistor density is now slowing down, and new technological breakthroughs are urgently needed to sustain the ongoing information technology revolution.
This project creates a new memristor-based nano-computing architecture that circumvents the fabrication density problems associated with traditional transistor-based integrated circuits. The project investigates the fundamental principles of memristor-based nano-computing and designs efficient memristor-based nano-crossbar circuits that can execute elementary bit-vector mathematical and logical computations. The project pursues a transformative agenda for next-generation extreme-scale computing involving two design principles: (1) the use of memristors as distributed asynchronous digital switches and continuous-valued non-volatile nano-stores of input data and intermediate results, and (2) the use of sneak-paths in nano-crossbars as fundamental computational primitives that pool together results of intermediate computations from distributed memristor nano-stores.
The memristor-based nano-computing architecture developed in the project will enable the execution of legacy programs on low-energy ultra-dense memristive nano-crossbar circuits and will facilitate the design of domain-specific parallel execution engines that combine storage and computation on the same chip - thereby nullifying the traditional barrier between the memory and the microprocessor.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
The success of Moore's law over the last few decades has created a soceital expectation of continued expoential growth in computing power. However, the clock speed of a single processing core has not grown exponentially over the last decade. Further, the rise of big data has exposed the bottleneck between the processor and the memory as large amounts of data now need to be moved from memory to the processor and back.
This collaborative project brought together researchers in nanotechnology and computer science to investigate the design of a new computing system that employs the flow of current through non-volatile memory and exploits device-level parallelism. By allowing computing to be performed in the non-volatile memory, our design breaks through the barrier between the processor and the memory in traditional John von Neumann computing.
Computer science researchers at the University of Central Florida used formal methods to automatically discover how data can be stored in non-volatile memory to implement a one-bit adder and then validated this design using simulation software. Nanotechnology researchers at SUNY Polytechnic Institute fabricated the design using memristors and verified the correctness of the design in practice. The nanotechnology team characterized the performance of the automatically designed circuit and found its power-delay product to be substantially superior to existing approaches. The automated design algorithms have created flow-based crossbar computing designs for circuits as complex as a 64-bit adder.
The technical results of the project have been disseminated through publications in selective technical conferences like ISCAS, DATE and NANOARCH. The project has partially supported the training of graduate researchers including a graduate student who was subsequently awarded the National Science Foundation Graduate Research Fellowship.
The exploratory project has established the fundamental principles of computing using flows in non-volatile memory arrays that exploit device-level parallelism and break through the John von Neumann barrier. It has also demonstrated how a team of computer scientists and nanotechnologists can collaborate to create and validate a new non-intuitive computing paradigm. We believe that nanosale flow-based crossbar computing circuits may be designed and implemented for specific applications by leveraging these foundational results and scaling up the automated synthesis algorithms to enable more complex computations.
Last Modified: 12/25/2017
Modified by: Sumit K Jha
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