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Award Abstract # 1350680
CAREER: Opportunistic Through-Silicon-Via Utilization: Device, Circuit and Design Automation Perspectives

NSF Org: CCF
Division of Computing and Communication Foundations
Recipient: UNIVERSITY OF MISSOURI SYSTEM
Initial Amendment Date: January 23, 2014
Latest Amendment Date: July 24, 2015
Award Number: 1350680
Award Instrument: Continuing Grant
Program Manager: Sankar Basu
sabasu@nsf.gov
 (703)292-7843
CCF
 Division of Computing and Communication Foundations
CSE
 Directorate for Computer and Information Science and Engineering
Start Date: March 1, 2014
End Date: October 31, 2015 (Estimated)
Total Intended Award Amount: $400,000.00
Total Awarded Amount to Date: $176,540.00
Funds Obligated to Date: FY 2014 = $49,319.00
FY 2015 = $0.00
History of Investigator:
  • Yiyu Shi (Principal Investigator)
    yshi4@nd.edu
Recipient Sponsored Research Office: Missouri University of Science and Technology
300 W. 12TH STREET
ROLLA
MO  US  65409-1330
(573)341-4134
Sponsor Congressional District: 08
Primary Place of Performance: Missouri University of Science and Technology
300 W 12th Street
Rolla
MO  US  65409-0001
Primary Place of Performance
Congressional District:
08
Unique Entity Identifier (UEI): Y6MGH342N169
Parent UEI:
NSF Program(s): Information Technology Researc,
Software & Hardware Foundation
Primary Program Source: 01001415DB NSF RESEARCH & RELATED ACTIVIT
01001516DB NSF RESEARCH & RELATED ACTIVIT

01001617DB NSF RESEARCH & RELATED ACTIVIT

01001718DB NSF RESEARCH & RELATED ACTIVIT

01001819DB NSF RESEARCH & RELATED ACTIVIT
Program Reference Code(s): 1045, 7945, 9150, CL10
Program Element Code(s): 164000, 779800
Award Agency Code: 4900
Fund Agency Code: 4900
Assistance Listing Number(s): 47.070

ABSTRACT

The three-dimensional integrated circuit (3D IC) stacks multiple dies in the vertical dimension using Through-Silicon-Vias (TSVs), which results in significantly reduced footprint, power and latency. While many challenges still exist related to 3D ICs, this project targets the one challenge that will become increasingly important in the next 5 to 10 years and may potentially end the production of 3D ICs: TSVs are quite large in size, yet their diameters do not scale with the devices due to the limitations of wafer handling and aspect ratios. On the other hand, a large number of TSVs are needed to deliver signal and power, to dissipate heat, and to provide redundancy. Moreover, foundries impose a minimum TSV density rule to maintain the planarity of the wafer during chemical and mechanical polishing (CMP). This project tackles the challenge by reconfiguring idle TSVs as devices for various circuits and systems. An opportunistic computer-aided design (CAD) framework will also be put forward for optimum utilization of the TSV devices.

The proposed research will pioneer a new and transformative direction for the advancement of 3D ICs at all the design levels - devices, circuits and CAD - with no change required in current semiconductor processes. The PI will also leverage the collaboration with Industrial Technology Research Institute to set up an extensive international internship program for U.S. undergraduates and graduates, which will benefit the general 3D IC research community. In addition, the PI will develop various activities for undergraduates and underrepresented minorities within the research framework, full-filled 3D Tetris contests for Rolla local high school students, and a web 2.0-based 3D forum for collaborative research in the 3D IC community.

PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH

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Umamaheswara Rao Tida, Cheng Zhuo and Yiyu Shi "Novel Through-Silicon-Via Inductor Based On-chip DC-DC Converter Designs in 3D ICs" ACM Journal on Emerging Technologies in Computing Systems , v.11 , 2014 , p.16:1
Umamaheswara Rao Tida, Rongbo Yang, Cheng Zhuo and Yiyu Shi "On the Efficacy of Through-Silicon-Via Inductors" IEEE Transactions on Very Large Scale Integration (VLSI) Systems , 2014

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