The project envisaged ascertaining whether sensing and information processing capabilities can be fused together so that energy needed to transmit the humongous amount of sensed data to remote computers can be minimized. Specifically, the project explored whether computing functions such as contour recognition of an image or line detection within an image can be accomplished by 3-D confined quantum dot arrays that are directly connected to the pixel plane. A 3-D Schrodinger equation solver was developed at first to model the tunneling currents through quantum dots by using transfer matrix formulation. Then quantum dots were combined to build a super dot that is comparable to the size of a single pixel. By using passive components around the super dots, different types of spatio-temporal filtering functions were developed to process both static (edge and line detection) and dynamic images such as velocity tuning. Also, an exploratory color image processor was built around a multi-peak quantum tunneling device and several types of functions such as quantization, smoothing, and shifting were realized by deploying both active and passive components networked around the super dots. Ultimately, an analog programmable image processor was built by co-integrating memristor-based square resistive meshes with quantum dots. By programing the resistances of memristors, one could implement multiple and disparate image processing functions on the same chip. These are major intellectual aspects of this high risk and high payoff exploratory research project.

In addition to ultra-low-power sensing-processing fusion hardware, subthresold CMOS based wireless sensing network was designed, fabricated and tested using TSMC 65 nm process technology. The WSN chip was capable of sensing a variety of chemical, medical, and manufacturing data by means of low-noise amplifier, and then converting the analog data into digital packets that could be transmitted to a remote computer. The WSN chip was also provided with the ability to remotely wake up the chip that was normally held into sleep or disabled mode. The wake-up receiver was able to process incoming requests and activate the power management unit to provide several levels of voltages ranging from 300 mV to 1.0 V by using DC-DC conversion techniques 

The research made long-term broader impact by developing ultra-low-power wearable components that are now revolutionizing the consumer electronic products. Concurrently, to train engineers of the next generation, the principal investigator had developed an ultra-low-power subthreshold CMOS system design course that he taught three times to senior and graduate students. The PI also is coauthoring a textbook on the subject so that future generation VLSI designers can acquire an in-depth knowledge for designing energy-harvested, wearable and handheld electronic products. The book is intended to disseminate the knowledge gathered during this research project and the new book will enable students in other universities as well as practicing engineers working in VLSI industry to learn innovative design techniques at ultra low-voltages to retain the energy dissipation to a minimal value.     

Last Modified: 12/29/2016
Modified by: Pinaki Mazumder