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Award Abstract # 0205682
ITR: Reconfigurable Fabric

NSF Org: CNS
Division Of Computer and Network Systems
Recipient: UNIVERSITY OF CALIFORNIA, LOS ANGELES
Initial Amendment Date: July 19, 2002
Latest Amendment Date: August 31, 2005
Award Number: 0205682
Award Instrument: Continuing Grant
Program Manager: D. Helen Gill
CNS
 Division Of Computer and Network Systems
CSE
 Directorate for Computer and Information Science and Engineering
Start Date: September 1, 2002
End Date: August 31, 2006 (Estimated)
Total Intended Award Amount: $1,500,001.00
Total Awarded Amount to Date: $1,600,001.00
Funds Obligated to Date: FY 2002 = $500,000.00
FY 2003 = $488,624.00

FY 2004 = $511,377.00

FY 2005 = $100,000.00
History of Investigator:
  • Majid Sarrafzadeh (Principal Investigator)
    majid@cs.ucla.edu
  • Deborah Estrin (Co-Principal Investigator)
  • Yang Yang (Co-Principal Investigator)
  • Mani Srivastava (Co-Principal Investigator)
  • Glenn Reinman (Co-Principal Investigator)
Recipient Sponsored Research Office: University of California-Los Angeles
10889 WILSHIRE BLVD STE 700
LOS ANGELES
CA  US  90024-4200
(310)794-0102
Sponsor Congressional District: 36
Primary Place of Performance: University of California-Los Angeles
10889 WILSHIRE BLVD STE 700
LOS ANGELES
CA  US  90024-4200
Primary Place of Performance
Congressional District:
36
Unique Entity Identifier (UEI): RN64EPNH8JC6
Parent UEI:
NSF Program(s): Information Technology Researc,
ITR MEDIUM (GROUP) GRANTS
Primary Program Source: app-0102 
app-0103 

app-0104 

app-0105 
Program Reference Code(s): 1656, 1667, 9215, 9216, 9218, HPCC
Program Element Code(s): 164000, 168700
Award Agency Code: 4900
Fund Agency Code: 4900
Assistance Listing Number(s): 47.070

ABSTRACT

Because of the relentless march of the silicon-based electronics technology as predicted by Moore's Law, computation, storage, and communication are now woven into the fabrics of our lives. The emerging technology of flexible electronics, where electronics components such as transistors and wires are built on a thin flexible material, offers a similar opportunity to weave computation, storage, and communication into the fabric of the very clothing that we wear. The implications of seamlessly integrating a large number of communicating computation and storage resources, mated with sensors and actuators, in close proximity to the human body will transform many aspects of biomedical research and practice. For example, one can imagine biomedical applications where biometric and ambient sensors are woven into the garment of a patient or a person in a medically-critical or hazardous environment to trigger or modulate the delivery of a drug.
To realize this vision outside the laboratory, radical innovation is required in the area of system-level information technology. These systems will not scale to widespread use if they are viewed simply as traditional chips or motherboards based on a different, flexible form factor. Rather, a rethinking of the architecture and the design methodology for all layers of these systems is needed. The reasons are two-fold. First, the underlying technology of electronics in flexible materials has characteristics and computation-communication cost trade-offs that are very different from that of silicon and PCB-based electronics. Second, the natural applications of these systems have environmental dynamics, physical coupling, resource constraints, infrastructure support, and robustness requirements that are very different from those faced by traditional systems.
One of the challenges in developing the needed information technology architecture and design methodology for these systems is that one needs to both conduct experimental work and develop a conceptual understanding of the problem domain. This research studies:
Application: Use as a driver application capability, reconfigurable fabric (R-Fabric) based on a combination of (i) the technology of flexible electronics using organic materials, and (ii) computing, communication, and sensing elements implemented as E-Buttons.
Architecture: Develop the general architecture concepts and cost/performance optimization techniques. The issues that we will focus on will include (i) appropriate primitives for composing the architecture, (ii) system interconnect network optimized for the electrical characteristics of the organic electronics, (iii) techniques to cope with the high ration of communication to computation cost, and (iv) architecture level self-configuration and re-configuration for robust operation.
Programming: Develop techniques and primitives for programming a system composed of hundreds of computation, storage, sensing, and actuation elements that are individually resource constrained and are connected by a structured but fault-prone high-cost interconnect network.
Processors: Develop domain-specific processor architecture optimized for these power-constrained, physically coupled applications.

Design Methodology: Develop techniques and hybrid emulation platform for systematic architecture exploration, simulation, optimization, and reconfiguration of these systems.

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