The balance between human existence and microchip benefits is being severely challenged by a relentless and unsustainable appetite for electronics consumption. Microelectronic products account for about 31% of global greenhouse gas emissions today. Mega Data Centers consuming tens of Megawatts of power and growing at 25-30% per year driven by video demand, will require 10% of the world electricity generation by 2030.

With the National Science Foundation Convergence Accelerator program, we have established a global microchip sustainability project called FUTUR-IC, which creates self-consistent three dimensions of technology, ecology, and workforce (TEW) solutions to sustain the continued progress of the semiconductor industry.

The Package Scaling Era: The Chip Scaling Era has ended, and the Package/System Scaling Era is now in full implementation with no long-term technology roadmap. To maintain performance scaling: i) incremental technology change is insufficient, and ii) supply chain sustainability in terms of workforce quality, materials criticality, and manufacturing effluent has no inherent scaling vector. Economic risk for the nation has never been so large, and rarely been so dependent on a particular technology evolution. This transformation to chip/package scaling is not a task that any one sector can tackle in isolation; it requires a robust member-led global Alliance like FUTUR-IC that unites academia, industry, government, and community. FUTUR-IC identifies concurrently engineered solutions to build a common learning curve to power the next 40 years of progress for the semiconductor industry.

Frontier constraints in the microchip industry are:

1) T: Technology (Profits): Enhanced microchip functionality for next generation applications such as AI, 6G, LiDAR etc. can no longer depend solely on shrinking the dimensions of a transistor;

2) E: Ecology (Planet): Net-Zero environmental impact for a product life cycle is critical to life on earth; and

3) W: Workforce (People): Leadership from a new green-literate STEM workforce is required.  

Solutions defined by concurrent TEW constraints build converged pathways on which to base decades of progress. FUTUR-IC members contribute via joint research projects to innovate in sustainable microchip technology development. Engineers, scientists, executives, and policy makers will work together to assess and remedy common risks presented by technology change, ecological boundaries, and workforce competency. This unique Alliance creates consensus for investments with its three-dimensional TEW research model.

Technology: Major goals of the technology vector in Phase 1 were to demonstrate innovative solutions to improve microchip performance, while paying close attention to the ecological impact of materials and processes selected to manufacture these products.  Based on stakeholder analysis, the FUTUR-IC team learned that energy required during device use is an important factor because in data centers, using electronics alone leads to unsustainable thermal management issues. We demonstrated two novel prototypes of an electronic-photonic (EP) coupler, a key component that integrates electronics with photonics in the same package, enabling the next generation chiplet technology. For example, in a datacenter application, electronic-photonic integration using these couplers can increase bandwidth and communication speed while minimizing energy consumption.

Ecology: As a trusted source, MIT continues to harness its campus-wide sustainability resources to coalesce consensus on reporting metrics, by creating a platform for researchers to work with industry organizations like iNEMI and SEMI; and with the NSF Convergence Accelerator’s Track-I cohort, to define technology roadblocks and solutions within ecology and workforce development constraints.  The team created two distinct surveys, one for consumers, and another for industry collaborators across the supply chain, to elicit feedback.

Based on these surveys, the FUTUR-IC Alliance has been established, through which it was confirmed that for ecological benefit to the planet, Life Cycle Assessment (LCA) along the value chain, which is a key measure of environmental impact, is required. However, today there are no universal LCA standards for semiconductor manufacturing. To overcome this challenge, FUTUR-IC has (i) partnered with SEMI (organization of about 2500 companies), for creating an accurate model to calculate the environmental impact of products and processes; and (ii) begun to create a standardized measurement system to track progress in minimizing detrimental environmental impact.

Workforce: FUTUR-IC’s Workforce Vector aligns with the Technology and Ecology initiatives by creating and customizing new educational curricula for the microchip industry, addressing a critical gap in the field, namely sustainability. 

Two new undergraduate courses were implemented: (i) Sustainable Microchip Manufacturing at Bridgewater State University, culminating with poster presentations; and (ii) Principles of Manufacturing at MIT, where students learned about hazardous waste abatement within the microchip fabrication facility at MIT.

A hands-on boot camp on electronic-photonic testing and packaging was held at MIT and BSU. Virtual Reality (VR) simulations, which are scalable and generate greater social impact, were used to enhance STEM learning and sustainability awareness.

The educational content created is multidimensional and accessible to a wide audience, ranging from K-12 students to industry leaders.

Last Modified: 04/01/2024
Modified by: Anuradha M Agarwal