Award Abstract # 2139167
EAGER: Transforming Optical Neural Network Accelerators with Stochastic Computing

NSF Org: CNS
Division Of Computer and Network Systems
Recipient: UNIVERSITY OF KENTUCKY RESEARCH FOUNDATION, THE
Initial Amendment Date: August 12, 2021
Latest Amendment Date: August 29, 2023
Award Number: 2139167
Award Instrument: Standard Grant
Program Manager: Daniel Andresen
CNS
 Division Of Computer and Network Systems
CSE
 Directorate for Computer and Information Science and Engineering
Start Date: October 1, 2021
End Date: September 30, 2025 (Estimated)
Total Intended Award Amount: $299,735.00
Total Awarded Amount to Date: $343,554.00
Funds Obligated to Date: FY 2021 = $299,735.00
FY 2023 = $43,819.00
History of Investigator:
  • Ishan Thakkar (Principal Investigator)
    igthakkar@uky.edu
  • Jeffrey Hastings (Co-Principal Investigator)
  • sayed ahmad salehi (Co-Principal Investigator)
Recipient Sponsored Research Office: University of Kentucky Research Foundation
500 S LIMESTONE
LEXINGTON
KY  US  40526-0001
(859)257-9420
Sponsor Congressional District: 06
Primary Place of Performance: University of Kentucky Research Foundation
109 Kinkead Hall
Lexington
KY  US  40526-0001
Primary Place of Performance
Congressional District:
06
Unique Entity Identifier (UEI): H1HYA8Z1NTM5
Parent UEI:
NSF Program(s): Special Projects - CNS,
CSR-Computer Systems Research
Primary Program Source: 01002324DB NSF RESEARCH & RELATED ACTIVIT
01002122DB NSF RESEARCH & RELATED ACTIVIT
Program Reference Code(s): 7354, 7916
Program Element Code(s): 171400, 735400
Award Agency Code: 4900
Fund Agency Code: 4900
Assistance Listing Number(s): 47.070

ABSTRACT

In the past decade, machine learning algorithms and models such as Deep Neural Networks (DNNs) have become increasingly prevalent for many emerging applications, such as medical prognosis, autonomous transportation, weather forecast, speech recognition and translation, image/video recognition and synthesis. This increasing prevalence has necessitated that the computing hardware platforms that process DNNs deliver consistently high performance and fast processing speeds. This need has driven computer hardware architects to design custom accelerator chips for processing DNNs. As researchers explore more sophisticated and powerful models of DNNs, the compute speed and throughput requirements from these DNN accelerator chips also increase. Traditional electronic implementations of DNN accelerator chips are breaking down under this pressure, which is catastrophic as it prevents the immediate widespread adoption of high-performance artificial intelligence that can transform society and improve lives. Fortunately, silicon photonics-based optical computing (OC) has emerged as an exciting paradigm that can replace slow electronic processing of DNNs with much faster, light-speed DNN processing. By processing DNNs directly in the optical domain, OC-based DNN accelerator chips have the potential to provide up to a thousand times faster processing speeds than traditional electronic chips. However, viable realization and deployment of OC-based DNN accelerators present enormous challenges, because the silicon-photonic building blocks of such accelerators consume very high static power, require excessively large silicon real estate, exhibit susceptibility to uncertainty induced errors, and lack flexibility. This project will involve transformative research to overcome these fundamental challenges and pave the way for realizing future OC-based DNN accelerator chips that are miniature in size, but possess the computing power to enable lower-cost, ultra-fast, and highly reliable processing of artificial intelligence tasks. Close collaborations with academic partners at the NSF NNCI node, Kentucky Multiscale, will aid in the rapid prototyping of the developed technology.

The key contribution of this project will be to design potentially groundbreaking architectures of OC-based DNN accelerators that will employ stochastic computing (SC) to realize various DNN processing functions. This project is critical early exploratory research because it focuses on a radically transformative goal of merging the disciplines of SC and OC in a highly synergistic manner for the important use case of DNN accelerator design. Such synergistic integration of SC and OC has never been explored before and involves interdisciplinary perspectives and new approaches that are considered to be more ?high risk-high payoff? than the typical research in CSR or other areas of CISE/NSF. The proposed synergistic integration of SC and OC will lay down a blueprint for realizing a new class of DNN accelerator architectures that will combine the processing speed benefits of OC with the area-efficiency, flexibility, static power efficiency, and error tolerance of SC, and be at the heart of the revolutionary artificial intelligence of the next generation to transform our lives in innumerable ways. Moreover, by exposing graduate students to the diverse aspects of stochastic arithmetic, probability theory, optical computing, nanofabrication, deep neural networks, and electro-optical characterization, this project will contribute towards an agile, high-tech workforce that will maintain continued US leadership in technological innovation.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH

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Karempudi, Venkata Sai and Datta, Shreyan and Thakkar, Ishan G "Design Exploration and Scalability Analysis of a CMOS-Integrated, Polymorphic, Nanophotonic Arithmetic-Logic Unit" SenSys '21: Proceedings of the 19th ACM Conference on Embedded Networked Sensor Systems , 2021 https://doi.org/10.1145/3485730.3494042 Citation Details
Praneeth Karempudi, Venkata Sai and Sri Vatsavai, Sairam and Thakkar, Ishan and Hastings, Jeffrey Todd "A Polymorphic Electro-Optic Logic Gate for High-Speed Reconfigurable Computing Circuits" IEEE International Symposium on Quality Electronic Design (ISQED) , 2023 https://doi.org/10.1109/ISQED57927.2023.10129380 Citation Details
Shivanandamurthy, Supreeth Mysore and Vatsavai, Sairam Sri and Thakkar, Ishan and Salehi, Sayed Ahmad "AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning" IEEE International Symposium on Quality Electronic Design , 2023 https://doi.org/10.1109/ISQED57927.2023.10129301 Citation Details
Thakkar, Ishan and Sri Vatsavai, Sairam and Karempudi, Venkata Sai "High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic Electro-Optic Circuits and Architectures" ACM Great Lakes Symposium on VLSI (GLSVLSI) , 2023 https://doi.org/10.1145/3583781.3590258 Citation Details
Vatsavai, Sairam Sri and Karempudi, Venkata Sai and Thakkar, Ishan and Salehi, Ahmad and Hastings, Todd "SCONNA: A Stochastic Computing Based Optical Accelerator for Ultra-Fast, Energy-Efficient Inference of Integer-Quantized CNNs" IEEE International Parallel & Distributed Processing Symposium (IPDPS) , 2023 https://doi.org/10.1109/IPDPS54959.2023.00061 Citation Details
Vatsavai, Sairam Sri and Sai Praneeth Karempudi, Venkata and Thakkar, Ishan "An Optical XNOR-Bitcount Based Accelerator for Efficient Inference of Binary Neural Networks" IEEE International Symposium on Quality Electronic Design , 2023 https://doi.org/10.1109/ISQED57927.2023.10129294 Citation Details
Vatsavai, Sairam Sri and Thakkar, Ishan "A Bit-Parallel Deterministic Stochastic Multiplier" IEEE International Symposium on Quality Electronic Design , 2023 https://doi.org/10.1109/ISQED57927.2023.10129297 Citation Details
Vatsavai, Sairam Sri and Thakkar, Ishan G "Photonic Reconfigurable Accelerators for Efficient Inference of CNNs with Mixed-Sized Tensors" IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2022 https://doi.org/10.1109/TCAD.2022.3197538 Citation Details

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