Award Abstract # 2117349
MRI: Acquisition of High-Resolution Photon Emission/Laser Fault Injection Microscope with High-Performance Computers for Failure Analysis and Security Assessment of Electronic Syst

NSF Org: ECCS
Division of Electrical, Communications and Cyber Systems
Recipient: WORCESTER POLYTECHNIC INSTITUTE
Initial Amendment Date: August 4, 2021
Latest Amendment Date: September 7, 2022
Award Number: 2117349
Award Instrument: Standard Grant
Program Manager: Jenshan Lin
jenlin@nsf.gov
 (703)292-7360
ECCS
 Division of Electrical, Communications and Cyber Systems
ENG
 Directorate for Engineering
Start Date: August 15, 2021
End Date: July 31, 2024 (Estimated)
Total Intended Award Amount: $360,608.00
Total Awarded Amount to Date: $360,608.00
Funds Obligated to Date: FY 2021 = $360,608.00
History of Investigator:
  • Fatemeh Ganji (Principal Investigator)
    fganji@wpi.edu
  • Berk Sunar (Co-Principal Investigator)
  • Patrick Schaumont (Co-Principal Investigator)
  • Ulkuhan Guler (Co-Principal Investigator)
  • Shahin Tajik (Co-Principal Investigator)
Recipient Sponsored Research Office: Worcester Polytechnic Institute
100 INSTITUTE RD
WORCESTER
MA  US  01609-2280
(508)831-5000
Sponsor Congressional District: 02
Primary Place of Performance: Worcester Polytechnic Institute
100 Institute Road
Worcester
MA  US  01609-2280
Primary Place of Performance
Congressional District:
02
Unique Entity Identifier (UEI): HJNQME41NBU4
Parent UEI:
NSF Program(s): Major Research Instrumentation
Primary Program Source: 01002122DB NSF RESEARCH & RELATED ACTIVIT
Program Reference Code(s): 153E, 1189, 105E
Program Element Code(s): 118900
Award Agency Code: 4900
Fund Agency Code: 4900
Assistance Listing Number(s): 47.041

ABSTRACT

This MRI acquisition project will allow the purchase of a high-resolution Photon Emission/Laser Fault Injection microscope and high-performance computers. This setup will provide a platform for research, teaching, and hands-on experience for students and industry professionals. The research this instrumentation will enable focuses on the performance and security analyses of electronic devices and systems at different stages of their lifetime which will address a critical issue, securing the integrated circuit (IC) supply chain. The project has the potential to secure large number of devices used across sensitive applications, such as in healthcare, artificial intelligence (AI), finance, transportation, and defense. With a user-friendly interface, the instrument is expected to maximize the accessibility for on-site and off-campus students and researchers. The data collected from this setup will be further made available as benchmarks to researchers in the field of AI and cybersecurity. The instrument will bring unique capabilities to the PIs? institution and surrounding areas to conduct research, education, and outreach activities on IC security. The PIs plan to educate and train students through online and on-site courses, as well as seminars and workshops. The PIs plan to promote broadening the participation in this research area, especially recruitment of female students.

The MRI instrument is expected to facilitate research geared to the needs of the semiconductor industry, especially with the focus on security and reliability of ICs, including three interdisciplinary topics, IC tampering and counterfeiting detection, security testing and design for security, and security evaluation using AI. The common factor among these themes is the requirement for an advanced optical mechanism to interact with an integrated circuit at the scale of a single or a handful of transistors in a non-destructive fashion. While the first topic addresses the attacks that can be mounted during the pre- and post-fabrication, the second topic aims to provide a framework for testing and certifying a chip after manufacturing and designing a more secure chip. To achieve the goals defined in these themes, in the third topic, AI acts as an enabler since its essential role is to help analyze the data more efficiently and extract more in-depth and comprehensive information to back methodologies in the prior topics.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH

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Hashemi, Mohammad and Mehta, Dev and Mitard, Kyle and Tajik, Shahin and Ganji, Fatemeh "FaultyGarble: Fault Attack on Secure Multiparty Neural Network Inference" , 2024 https://doi.org/10.1109/FDTC64268.2024.00015 Citation Details
Hashemi, Mohammad and Mehta, Dev and Mitard, Kyle and Tajik, Shahin and Ganji, Fatemeh "FaultyGarble: Fault Attack on Secure Multiparty Neural Network Inference" , 2024 Citation Details
Koblah, David S. and Ganji, Fatemeh and Forte, Domenic and Tajik, Shahin "Hardware Moving Target Defenses against Physical Attacks: Design Challenges and Opportunities" ACM Workshop on Moving Target Defense , 2022 https://doi.org/10.1145/3560828.3564010 Citation Details
Krachenfels, Thilo and Seifert, Jean-Pierre and Tajik, Shahin "Trojan awakener: detecting dormant malicious hardware using laser logic state imaging (extended version)" Journal of Cryptographic Engineering , v.13 , 2023 https://doi.org/10.1007/s13389-023-00323-3 Citation Details
Mehta, Dev M and Hashemi, Mohammad and Forte, Domenic and Tajik, Shahin and Ganji, Fatemeh "1/0 Shades of UC: Photonic Side-Channel Analysis of Universal Circuits" IACR Transactions on Cryptographic Hardware and Embedded Systems , v.2024 , 2024 https://doi.org/10.46586/tches.v2024.i3.574-602 Citation Details
Mehta, Dev M. and Hashemi, Mohammad and Koblah, David S. and Forte, Domenic and Ganji, Fatemeh "Bake It Till You Make It: Heat-induced Power Leakage from Masked Neural Networks" IACR Transactions on Cryptographic Hardware and Embedded Systems , v.2024 , 2024 https://doi.org/10.46586/tches.v2024.i4.569-609 Citation Details
Mosavirik, Tahoura and Schaumont, Patrick and Tajik, Shahin "ImpedanceVerif: On-Chip Impedance Sensing for System-Level Tampering Detection" IACR Transactions on Cryptographic Hardware and Embedded Systems , 2023 https://doi.org/10.46586/tches.v2023.i1.301-325 Citation Details
Roy, Sourav and Farheen, Tasnuva and Tajik, Shahin and Forte, Domenic "Self-timed Sensors for Detecting Static Optical Side Channel Attacks" International Symposium on Quality Electronic Design , 2022 Citation Details
Vakhter, Vladimir and Soysal, Betul and Schaumont, Patrick and Guler, Ulkuhan "Threat Modeling and Risk Analysis for Miniaturized Wireless Biomedical Devices" IEEE Internet of Things Journal , 2022 https://doi.org/10.1109/JIOT.2022.3144130 Citation Details

PROJECT OUTCOMES REPORT

Disclaimer

This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.

Two categories of objectives achieved in this project are (1) technical and (2) workforce development. 

In this first category, during the course of the project, 5 journal papers and 2 conference papers were published, which are deposited and made available in the NSF Public Access Repository (PAR). These papers present some of the very first results related to the security of semiconductor chips and users' privacy. For instance, assessment of security and practical feasibility of secure and private circuit implementation, e.g., AI accelerators (the picture is taken from the paper: 1/0 Shades of UC: Photonic Side-Channel Analysis of Universal Circuits, https://doi.org/10.46586/tches.v2024.i3.574-602). 

When it comes to workforce development, the project’s objectives, as detailed below, have been fulfilled successfully. 

1. Workforce development through defining new curricula that include the research results done in this project's context.

2. Conducting research with a focus on research opportunities for under/graduate students. 

3. Organization of New England Hardware Security Day workshops in 2022, 2023, and 2024 (NEHWS 2024: https://nehws.org)  organized by WPI, NEU, UMass Amherst, MIT, and Yale. This event brought together researchers and hardware security practitioners from universities in the New England area, including BU, MIT, NEU, UMass Amherst, UConn, UNH, WPI, Yale, and industry and governmental labs, including DRAPER, Massachusetts Technology Collaborative, MITRE, Raytheon Technology, Analog Devices, IBM, and MIT Lincoln Lab. The total number of attendees during the course of this project was  (approximately) 400 people. 

 


Last Modified: 11/02/2024
Modified by: Fatemeh Ganji

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