Award Abstract # 2008339
CNS Core: Small: Towards Secure-By-Design Integration of Emerging Non-Volatile Memory in Future Systems

NSF Org: CNS
Division Of Computer and Network Systems
Recipient: THE UNIVERSITY OF CENTRAL FLORIDA BOARD OF TRUSTEES
Initial Amendment Date: August 21, 2020
Latest Amendment Date: November 4, 2024
Award Number: 2008339
Award Instrument: Standard Grant
Program Manager: Marilyn McClure
mmcclure@nsf.gov
 (703)292-5197
CNS
 Division Of Computer and Network Systems
CSE
 Directorate for Computer and Information Science and Engineering
Start Date: October 1, 2020
End Date: September 30, 2025 (Estimated)
Total Intended Award Amount: $500,000.00
Total Awarded Amount to Date: $500,000.00
Funds Obligated to Date: FY 2020 = $500,000.00
History of Investigator:
  • Fan Yao (Principal Investigator)
    fan.yao@ucf.edu
  • Rickard Ewetz (Co-Principal Investigator)
  • Amro Awad (Co-Principal Investigator)
Recipient Sponsored Research Office: The University of Central Florida Board of Trustees
4000 CENTRAL FLORIDA BLVD
ORLANDO
FL  US  32816-8005
(407)823-0387
Sponsor Congressional District: 10
Primary Place of Performance: University of Central Florida
4000 Central Florida Blvd
Orlando
FL  US  32816-8005
Primary Place of Performance
Congressional District:
10
Unique Entity Identifier (UEI): RD7MXJV7DKT9
Parent UEI:
NSF Program(s): CSR-Computer Systems Research
Primary Program Source: 01002021DB NSF RESEARCH & RELATED ACTIVIT
Program Reference Code(s): 7923
Program Element Code(s): 735400
Award Agency Code: 4900
Fund Agency Code: 4900
Assistance Listing Number(s): 47.070

ABSTRACT

Computer systems are increasingly adopting Non-Volatile Memories (NVMs) that offer high capacity, superior power efficiency and persistent storage. Traditionally, tremendous effort has been made to address NVM security issues concerning the non-volatility property. However, the advent of hardware-based information leakage attacks necessities a systematic re-assessment of NVM memory architectures. This project is investigating the information security threats in the form of side and covert channels in computing systems where NVMs are integrated in different ways. A holistic examination of the security properties from device-level accesses to system-level management policies will be performed. Based on a comprehensive understanding of the potential attack vectors, this project will design efficient architecture and system level defensive techniques to defeat futuristic adversaries exploiting the discovered information leakage vulnerabilities in NVM-based systems. Towards this end, this project aims to bolster information security for systems with NVM integration from the following aspects: (1) Securing NVM as main memory; (2) Securing DRAM/NVM Hybrid Memory System; (3) Securing NVMs as Fast Storage Devices.

As traditional memory technology faces severe scalability issues, NVMs are increasingly playing key roles in the whole storage stack of server systems such as data centers and high-performance computing infrastructures. In light of the advances in hardware-based security breaches, understanding and taming information leakage due to the architecture/system design for emerging NVM-enabled systems are imperative for the future large-scale adoption. This project is systematically evaluating information leakage threats in emerging NVM memory and storage systems. If successful, the project will enable secure integration of NVMs in computing systems that are resistant to information leakage attacks. The work will result in the dissemination of tools, attack libraries, software, and simulation results to the computer architecture and security community.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH

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Chowdhuryy, Md Hafizul and Ewetz, Rickard and Awad, Amro and Yao, Fan "Seeds of SEED: R-SAW: New Side Channels Exploiting Read Asymmetry in MLC Phase Change Memories" 2021 International Symposium on Secure and Private Execution Environment Design (SEED) , 2021 https://doi.org/10.1109/SEED51797.2021.00013 Citation Details
Chowdhuryy, Md Hafizul and Ewetz, Rickard and Awad, Amro and Yao, Fan "Understanding and Characterizing Side Channels Exploiting Phase-Change Memories" IEEE Micro , v.43 , 2023 https://doi.org/10.1109/MM.2023.3238894 Citation Details
Chowdhuryy, Md Hafizul and Jung, Myoungsoo and Yao, Fan and Awad, Amro "D-Shield: Enabling Processor-side Encryption and Integrity Verification for Secure NVMe Drives" 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA) , 2023 https://doi.org/10.1109/HPCA56546.2023.10070924 Citation Details
Chowdhuryy, Md Hafizul and Rashed, Muhammad Rashedul and Awad, Amro and Ewetz, Rickard and Yao, Fan "LADDER: Architecting Content and Location-aware Writes for Crossbar Resistive Memories" MICRO '21: MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture , 2021 https://doi.org/10.1145/3466752.3480054 Citation Details
Chowdhuryy, Md_Hafizul Islam and Zhang, Zhenkai and Yao, Fan "PowSpectre: Powering Up Speculation Attacks with TSX-based Replay" , 2024 https://doi.org/10.1145/3634737.3661139 Citation Details
Chowdhuryy, Md_Hafizul Islam and Zheng, Hao and Yao, Fan "MetaLeak: Uncovering Side Channels in Secure Processor Architectures Exploiting Metadata" , 2024 https://doi.org/10.1109/ISCA59077.2024.00056 Citation Details
Han, Xijing and Tuck, James and Awad, Amro "Horus: Persistent Security for Extended Persistence-Domain Memory Systems" 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO) , 2022 https://doi.org/10.1109/MICRO56248.2022.00087 Citation Details
Thijssen, Sven and Jha, Sumit Kumar and Ewetz, Rickard "COMPACT: Flow-Based Computing on Nanoscale Crossbars with Minimal Semiperimeter and Maximum Dimension" IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2021 https://doi.org/10.1109/TCAD.2021.3138356 Citation Details

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