| NSF Org: |
CNS Division Of Computer and Network Systems |
| Recipient: |
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| Initial Amendment Date: | June 19, 2018 |
| Latest Amendment Date: | June 19, 2018 |
| Award Number: | 1815959 |
| Award Instrument: | Standard Grant |
| Program Manager: |
Karen Karavanic
CNS Division Of Computer and Network Systems CSE Directorate for Computer and Information Science and Engineering |
| Start Date: | September 1, 2018 |
| End Date: | August 31, 2022 (Estimated) |
| Total Intended Award Amount: | $280,000.00 |
| Total Awarded Amount to Date: | $280,000.00 |
| Funds Obligated to Date: |
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| History of Investigator: |
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| Recipient Sponsored Research Office: |
2385 IRVING HILL RD LAWRENCE KS US 66045-7563 (785)864-3441 |
| Sponsor Congressional District: |
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| Primary Place of Performance: |
2385 Irving Hill Road Lawrence KS US 66045-7568 |
| Primary Place of
Performance Congressional District: |
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| Unique Entity Identifier (UEI): |
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| Parent UEI: |
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| NSF Program(s): | CSR-Computer Systems Research |
| Primary Program Source: |
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| Program Reference Code(s): |
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| Program Element Code(s): |
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| Award Agency Code: | 4900 |
| Fund Agency Code: | 4900 |
| Assistance Listing Number(s): | 47.070 |
ABSTRACT
Autonomous cars and drones demand high computational performance to process massive amount of real-time data while also keeping their size, weight, power and cost to an acceptable level. Graphics processing unit (GPU) is specially designed hardware to efficiently process such large data. Therefore, it is increasingly being integrated in new generations of computer chips. Unfortunately, such integrated chips often exhibit unpredictable timing behaviors due to unregulated use of shared hardware resources that can prevent timely execution of critical tasks. This project will create a new real-time computing infrastructure for GPU integrated computer chips to provide predictable timing and high-performance.
The project will create new resource management algorithms, task models, real-time synchronization protocols, and schedulability analysis methodologies for GPU integrated computing platforms that significantly improve time predictability and efficiency, and reduce analysis pessimism, compared to the state-of-the art. The project has three research objectives. The first objective is to develop software mechanisms to bound worst-case memory interference to controllable limits with minimal programmer intervention. The second objective is to maximize system resource utilization without sacrificing timing predictability of critical real-time tasks. The third objective is to develop modeling and analysis methodologies for the proposed computing infrastructure.
The project has several direct economic and societal impacts. This research will greatly improve temporal predictability and efficiency of GPU integrated computing platforms, which are used for safety-critical cyber-physical systems---particularly in automotive and aviation industries. Considering the market size of automotive industry and the high certification cost in aviation industry, the expected improvements of the project can potentially translate to multi-billion-dollar savings. The research outcomes will be disseminated via public code repositories and integrated into graduate and undergraduate courses. In particular, autonomous car and drone testbeds will be used to increase student engagement in the classes.
Research artifacts, such as source code of modified Linux kernel, user-level library, and tools will be publicly available via open-source repositories at https://github.com/CSL-KU/igpu-rm for the duration of the project and beyond. Research findings will be reported via scientific journals and conferences.
This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
Intelligent cyber-physical systems (CPS), such as autonomous cars and unmanned aerial vehicles, demand high computing performance to process the massive amount of real-time data. On the other hand, they also must meet stringent size, weight, power and cost constraints. Graphics processing units (GPUs) are well suited for high-performance parallel processing of large data. As such, most modern embedded processors integrate a GPU along with multiple CPU cores to meet the performance and efficiency requirements. However, these integrated CPU-GPU processors also bring serious challenges in terms of time predictability because contention on the shared resources between the CPU and GPU can greatly impact the execution timing of the critical time-sensitive programs running on the system, which is particularly problematic for many safety-critical CPS.
The project was motivated by a case study in which a deep neural network based AI controller failed to steer the car in time due to shared resource contention on the computing platform. The project focused on integrated CPU-GPU computing platforms with multiple CPU cores and a single GPU, all of which share a common memory subsystem, as it is representative of most common embedded computing platforms. This project was aimed at developing technologies to address the time predictability challenge of these integrated CPU-GPU SoC based computing platforms.
The main intellectual contributions of the project are as follows. First, the project developed a new class of denial-of-service attacks that are specially engineered to cause severe contention on certain shared memory resources on integrated computing platforms. From a series of experimental studies using the attacks, the project's findings greatly enhanced the research community's understanding of the impacts of shared resource contention and the limitations of the existing mitigation mechanisms. One of the papers received an outstanding paper award at a premier conference, indicating the significance of the work. Second, the project developed a number of new and enhanced software techniques that can be deployed on commodity platforms to minimize and mitigate shared resource contention. By combining new OS-level scheduling mechanisms and both software and hardware-level shared resource throttling mechanisms together, the project was able to provide stronger isolation guarantees to both CPU and GPU intensive time-sensitive applications. The developed scheduleing framework is also easy to analyze and deploy.
In terms of broader impacts, the PIs published and presented the research findings of this project at quality conferences, journals, and workshops. Two papers received prestigious paper awards from top venues. Some results were also featured in internet media. The results of this project formed the basis of the dissertations of two PhD students and one MS student. Most artifacts developed in the project were alrleady released via public github repositories as open-source.
Last Modified: 10/02/2022
Modified by: Heechul Yun
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