| NSF Org: |
ECCS Division of Electrical, Communications and Cyber Systems |
| Recipient: |
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| Initial Amendment Date: | September 21, 2017 |
| Latest Amendment Date: | August 29, 2019 |
| Award Number: | 1740286 |
| Award Instrument: | Continuing Grant |
| Program Manager: |
Carmina Londono
ECCS Division of Electrical, Communications and Cyber Systems ENG Directorate for Engineering |
| Start Date: | October 1, 2017 |
| End Date: | September 30, 2021 (Estimated) |
| Total Intended Award Amount: | $1,866,663.00 |
| Total Awarded Amount to Date: | $1,906,600.00 |
| Funds Obligated to Date: |
FY 2018 = $622,221.00 FY 2019 = $662,158.00 |
| History of Investigator: |
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| Recipient Sponsored Research Office: |
341 PINE TREE RD ITHACA NY US 14850-2820 (607)255-5014 |
| Sponsor Congressional District: |
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| Primary Place of Performance: |
116 Hoy Rd NY US 14853-5401 |
| Primary Place of
Performance Congressional District: |
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| Unique Entity Identifier (UEI): |
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| Parent UEI: |
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| NSF Program(s): |
Energy Efficient Computing: fr, EPMD-ElectrnPhoton&MagnDevices |
| Primary Program Source: |
01001819DB NSF RESEARCH & RELATED ACTIVIT 01001920DB NSF RESEARCH & RELATED ACTIVIT |
| Program Reference Code(s): |
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| Program Element Code(s): |
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| Award Agency Code: | 4900 |
| Fund Agency Code: | 4900 |
| Assistance Listing Number(s): | 47.041 |
ABSTRACT
In modern computer systems, memories located close to the processing unit must be fast with nearly infinite endurance to support operation rates exceeding a billion per second. However, these memories cannot be scaled to very small sizes, i.e. they are low-capacity, and/or they lose their contents when the power is off, i.e. they are volatile. Existing high-capacity non-volatile memories, such as solid-state hard drives, must typically be situated away from the processing unit. As a result, it takes extra time for a processing unit to fetch data, process them and store them back. Furthermore, most non-volatile memories can only be erased and written a finite number of times. An ultimate memory should be suitable to be embedded in all systems. The desired features of this memory include non-volatility, low-power operation, infinite endurance, large on-off ratios, excellent write-error rates, nanosecond writing time, sub-nanosecond reading time, and good scalability.
This project uses an interdisciplinary approach spanning materials, devices, circuits and architectures to realize such a memory and paradigm-shifting in-memory-processing architectures. The outcome will be durable, energy-efficient, pausable processing in polymorphic memories (DEEP3M), where computational capabilities are pushed directly into the high-capacity memories enabling massively parallel computation with fast and energy-efficient memory access. This approach builds on recent breakthroughs in physics of magnetic switching and advanced materials, and enables a transformative, holistic exploration of processing and memory by re-imaging the memory device as a computing element itself. This view will provide new insights and an entirely new paradigm for the semiconductor industry in the emerging era of Big Data. The team will also provide interdisciplinary educational opportunities to students and public alike.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
To date, we do not yet have a nonvolatile memory that is infinitely durable and operates near a GHz speed. That is what our DEEP3M team set out to explore. Is it possible to marry the best features of magnetism - one of the most prevalent nonvolatile memory schemes (think hard drive) - with the best features of semiconductors - another most prevalent nonvolatile memory schemes (think SSD) as well as the fundamental building block of today's electronics? The "glueing" material in between is called multiferroics - a special type of material that possesses both magnetism and ferroelectricity. Ferroelectricity can in turn modulate the electrical conductivity of a semiconductor in a nonvolatile fashion (think ferroFET as volatile memory). In this E2CDA/nCORE project, we proposed to create a heterostructure of materials to realize the resultant device, which we coined as SOTFETs. We also explored their utility in polymorphic memories and processing architecture. The project has 4 tightly integrated themes: materials, devices, circuits and architectures. Throughout the project, our team met biweekly and the students met more often taking advantage of the colocation of all PIs and researchers on the project. Our team also were active in promoting STEM via various platforms. Despite the extraordinary challenges faced due to COVID-19 shutdown, our team made significant progress on all thrusts.
Intellectual Merit:
DEEP3M materials. We established two research “tracks” that revolved around two multiferroics: BiFeO3 and LuFeO3. We developed growth and characterization of SOTFET structures: BiSex or Pt (spin-orbit materials) on CoFe2O4 or MnxN (magnetic materials) on BiFeO3 or LuFeO3 (multi-ferroics) on BaSnO3 or GaN (semiconductors).
DEEP3M devices. Given SOTFET is a novel device concept, we pursued both physics-based modeling and experimental demonstration in parallel. We established and improved our numerical model and explored a wide parameter space to realize SOTFET operation. Toward experimental realization of SOTFET, we fabricated and characterized LuFeO/AlGaN/GaN Fe-FET, as well as BaSnO3 FETs.
DEEP3M circuits. We used SOTFET to build non-volatile, energy-efficient, polymorphic memory bitcells and arrays, and benchmarked against CMOS based ones.
DEEP3M architecture. We developed and benchmarked three different PIM architectures using SOTFETs against CMOS: (1) EVE: Ephemeral VectorEngines; (2) CAPA: Content-Addressable Parallel Accelerators; and (3) PPAC: ParallelProcessing in Associative CAMs.
Broader impacts:
More than 10 PhD students and 2 postdoc were engaged in this project. Our team has to date published 14 journal papers, 6 conference proceedings, filed 3 patent disclosures. In addition, our team also gave 20+ presentations at various professional platforms in addition to the conference presentations. Our PIs, students and postdocs participated in 20+ outreach events connecting with school age children, upperclass high school students, inner city schools, rural area schools, first-generation students, as well as other general audiences.
Last Modified: 01/18/2022
Modified by: Huili (Grace) G Xing
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