
NSF Org: |
CNS Division Of Computer and Network Systems |
Recipient: |
|
Initial Amendment Date: | May 9, 2017 |
Latest Amendment Date: | May 9, 2017 |
Award Number: | 1730316 |
Award Instrument: | Standard Grant |
Program Manager: |
Yuanyuan Yang
CNS Division Of Computer and Network Systems CSE Directorate for Computer and Information Science and Engineering |
Start Date: | July 1, 2017 |
End Date: | June 30, 2020 (Estimated) |
Total Intended Award Amount: | $233,964.00 |
Total Awarded Amount to Date: | $233,964.00 |
Funds Obligated to Date: |
|
History of Investigator: |
|
Recipient Sponsored Research Office: |
1 SILBER WAY BOSTON MA US 02215-1703 (617)353-4365 |
Sponsor Congressional District: |
|
Primary Place of Performance: |
8 St. Mary's Street Boston MA US 02215-1300 |
Primary Place of
Performance Congressional District: |
|
Unique Entity Identifier (UEI): |
|
Parent UEI: |
|
NSF Program(s): | CCRI-CISE Cmnty Rsrch Infrstrc |
Primary Program Source: |
|
Program Reference Code(s): |
|
Program Element Code(s): |
|
Award Agency Code: | 4900 |
Fund Agency Code: | 4900 |
Assistance Listing Number(s): | 47.070 |
ABSTRACT
Design of future high-performance chips is hindered by severe temperature challenges. For example, existing cooling mechanisms cannot efficiently cool the extremely high power densities that are expected in exascale systems. Emerging cooling technologies, which may address these temperature challenges, are not easily accessible for experimentation to computer engineers. In fact, there is a substantial lag before a cooling technology becomes available for system design and optimization. Such lags cause design quality to be left on the table. To this end, this project proposes a software infrastructure that enables accurate modeling of cutting-edge cooling methods and that facilitates mutually customizing the computing and cooling systems to dramatically push system energy efficiency.
The proposed infrastructure is a system-level design automation tool that includes compact thermal models of emerging cooling methods (thermoelectric coolers, two-phase cooling with microchannels or nanopores, phase-change materials, and single-phase liquid cooling). The project plan includes (1) synthesizing novel device-level models into compact representations; (2) using measurements on prototypes for validation of the proposed models; and (3) developing automation tooling to co-design hybrid customized cooling subsystems together with a given computing system. The broader impact of the project will be to help advance computing beyond the limitations of Moore's Law by making efficient design of high-power-density systems possible. The proposed infrastructure will enable transformative research in design automation, computer architecture, and system design with emerging cooling technologies, particularly in the dimensions of performance, variability, energy, heterogeneity, and cross-layer design. The infrastructure will be released to the community as open source software. The interdisciplinary nature of the project creates ample opportunities for undergraduate projects and outreach programs for underrepresented groups and K-12 students.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
Note:
When clicking on a Digital Object Identifier (DOI) number, you will be taken to an external
site maintained by the publisher. Some full text articles may not yet be available without a
charge during the embargo (administrative interval).
Some links on this page may take you to non-federal websites. Their policies may differ from
this site.
PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
Over the last few decades, processor performance has grown tremendously following the down-scaling of transistors. High power densities that reach and surpass 1-2 KW/cm2 caused by the performance boost can occur in future high-performance chips and result in amplified localized hot spots. Existing cooling solutions such as forced air cooling via fans or traditional pin-fin heat sinks are often not sufficient to mitigate these high power densities efficiently and can lead to over/under-cooling, affecting system design cost and power. Therefore, designing new cooling solutions for high-performance processors has started to gain traction.
This project's aim was to develop fast and accurate thermal models for several promising emerging cooling technologies and utilize these models to evaluate the cooling efficiency of the specific cooling technologies on realistic high-power-density chips. The target emerging cooling technologies were as follows: (i) liquid cooling via microchannels, (ii) thermoelectric coolers (TEC), (iii) hybrid cooling of liquid cooling via microchannels and TEC, (iv) microchannel-based two-phase cooling, (v) two-phase vapor chambers (VCs) with micropillar wick evaporators, and (vi) two-phase VCs with hybrid wick evaporators. Commercial multi-physics simulators, such as COMSOL Multiphysics and ANSYS, are typically used to design and simulate the thermal models. However, these tools require significant effort to construct system-specific models. Such tools also incur long simulation times as well as large memory requirements. To build fast and accurate thermal models for the above emerging cooling technologies, we created compact thermal models (CTMs). For each cooling technology, we either derived the CTMs from corresponding finite element models or improved upon the modeling methodologies in recent work. All the cooling models have been validated against finite element models, prototypes, or CTMs that have been already validated. The modeling methodologies for building these CTMs can also be used to model other emerging cooling technologies in the future. We believe these CTMs can help the researchers to do early-stage design explorations and can enable co-designs of the computing systems and cooling systems.
A key component of the project was to develop a fast and accurate thermal simulation tool that can be easily extended to support different emerging cooling technologies. Existing popular CTM simulators are either dedicated to a specific cooling technology or it is difficult and time-consuming to extend them to support other cooling technologies. To address the above issues, we designed an open-source PArallel Compact Thermal simulator, PACT. PACT is now open sourced at https://github.com/peaclab/PACT. PACT can support parallel thermal simulations with multiple cores and nodes with various steady-state and transient solvers. It also has high compatibility and can be used along with popular architectural level performance and power simulators. Most importantly, PACT is designed to support a wide range of cooling technologies. To model new cooling methods that are currently not included in PACT, users simply need to add the cooling compact libraries to model their target cooling technology in PACT. PACT shows up to 232X speedup when compared to the popular compact modeling tool HotSpot. We also integrated optimization modules in PACT to select the optimal cooling method and cooling parameters to achieve the best cooling efficiency for a given chip design. We built PACT with the objective of conducting efficient thermal evaluation at different granularities, from standard-cell level to microarchitectural level, for a variety of chip integration and cooling technologies, in a single tool.
The major outcomes of this project are as follows:
-
We built finite element models for two-phase VCs with micropillar wick evaporators and two-phase VCs with hybrid wick evaporators of nanoporous membrane and microchannels. We also developed CTMs for liquid cooling via microchannels, TECs, hybrid cooling of liquid cooling via microchannels and TECs, microchannel-based two-phase cooling, two-phase VCs with micropillar wick evaporators, two-phase VCs with hybrid wick evaporators.
-
The above CTMs have been validated either against their finite element models, prototypes, or against the CTMs validated in prior work. We designed optimization modules to determine the optimal cooling solutions and cooling parameters for a given chip design. All the modeling methodologies, optimization modules, experimental results, and case studies with various realistic chips are accessible in our recent publications in major conferences, journals, and workshops.
-
We designed and open-sourced a parallel compact thermal simulator, PACT, that enables fast and accurate standard-cell level to architecture-level steady-state and transient thermal simulation.
-
The project created opportunities for undergraduate students to get involved in interdisciplinary research to improve their scientific research and software engineering skills. We also included major research updates from this project in university courses to broaden the impact of this project. We presented our works as oral presentations or posters at major conferences and workshops.
Last Modified: 09/22/2020
Modified by: Ayse K Coskun
Please report errors in award information by writing to: awardsearch@nsf.gov.