| NSF Org: |
CCF Division of Computing and Communication Foundations |
| Recipient: |
|
| Initial Amendment Date: | July 27, 2016 |
| Latest Amendment Date: | July 27, 2016 |
| Award Number: | 1649242 |
| Award Instrument: | Standard Grant |
| Program Manager: |
Yuanyuan Yang
CCF Division of Computing and Communication Foundations CSE Directorate for Computer and Information Science and Engineering |
| Start Date: | August 1, 2016 |
| End Date: | July 31, 2019 (Estimated) |
| Total Intended Award Amount: | $150,000.00 |
| Total Awarded Amount to Date: | $150,000.00 |
| Funds Obligated to Date: |
|
| History of Investigator: |
|
| Recipient Sponsored Research Office: |
3124 TAMU COLLEGE STATION TX US 77843-3124 (979)862-6777 |
| Sponsor Congressional District: |
|
| Primary Place of Performance: |
301 Harvey R Bright Building College Station TX US 77843-3112 |
| Primary Place of
Performance Congressional District: |
|
| Unique Entity Identifier (UEI): |
|
| Parent UEI: |
|
| NSF Program(s): | Software & Hardware Foundation |
| Primary Program Source: |
|
| Program Reference Code(s): |
|
| Program Element Code(s): |
|
| Award Agency Code: | 4900 |
| Fund Agency Code: | 4900 |
| Assistance Listing Number(s): | 47.070 |
ABSTRACT
Computer programs often have highly predictable behavior. Microprocessors use predictors to improve program performance and efficiency. Decisions made by a program can often be predicted with good accuracy, and patterns of data usage can be predicted to improve system efficiency and performance. However, incorrect predictions can lead to poor performance or lost opportunities for improving efficiency. This project proposes to use deep learning to improve prediction in microprocessors. Deep learning is a technology that has been used to improve computer vision and other pattern recognition tasks in large computing systems, but so far it has not been applied at the very small scale and tight timing margins of improving microprocessors. The project will likely result in improved microprocessors, as well as educational, mentoring, and career opportunities for under-represented groups in computer science. The PI will incorporate the research into classroom teaching. The Ph.D. students trained through this project will enhance industrial and academic workforce. The PI will continue to recruit women and minority graduate students into his research program for this project. Outreach to under-represented groups will include PI leadership and participation at CRA-W mentoring workshops for women and minority graduate students.
The goal of the proposed research is to exploit deep learning to design new microarchitectural predictors capable of exploiting previously untapped levels of predictability in program behavior to improve performance, power, and energy. Deep neural networks will be used to greatly improve the accuracy of microarchitectural predictors. This project will first explore latency-tolerant cache locality predictors, then move to control-flow prediction that has tighter timing constraints. Proposed predictors will be evaluated in a variety of contexts representing modern workloads at scales from mobile phones to datacenters. The research incurs a high-risk because no deep neural network has even been developed to operate at the sub-nanosecond level. However, the research offers a high-payoff due to the tremendous potential to improve performance. Results will be manifested through students' theses and dissertations as well as publication in top-tier architecture venues.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
Note:
When clicking on a Digital Object Identifier (DOI) number, you will be taken to an external
site maintained by the publisher. Some full text articles may not yet be available without a
charge during the embargo (administrative interval).
Some links on this page may take you to non-federal websites. Their policies may differ from
this site.
PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
The project explored using artificial intelligence techniques for improving performance of computer systems. Microprocessor performance can be improved by knowing the near-term future behavior of the program being executed. For example, microprocessors store frequently used values in caches, but with a small capacity, we must sometimes decide to move things out of the cache in favor of other things. This is the problem of cache replacement. This project used artificial intelligence techniques such as neural networks to predict various types of behavior to improve microprocessors.
The project resulted in three main research results:
1. Perceptron learning, a simple neural technique, was shown to be as powerful as more complex "deep" learning techniques for predicting the behavior of program in terms of accesses to memory. We showed that, by learning from multiple features, we could do a better job of cache replacement than the state of the art.
2. The techniques initially explored for cache management could also be applied to managing other on-chip structures, such as a cache for program instructions and the branch target buffer, which is a cache for storing the next location where control of a program should go based on decisions made during execution.
3. Neural learning also provides an excellent filter for prefetches. Prefetching is a technique where a processor can anticipate which items of data might be needed and get them into the cache in advance. However, many prefetching algorithms are too aggressive and bring in too many unneeded items. We find that neural techniques can filter the prefetcher and help bring in mostly items that will be useful, thus improving performance by using cache capacity more efficiently.
The research resulted in several publications at top computer architecture conferences. The research has received significant interest from industry.
Several Ph.D. and Master's students worked on the project. Two women received their Ph.D.s and one woman received her Master's degree partly as a result of research done on this project. One Hispanic woman who worked on the project and earned her Ph.D. is now an assistant professor at a minority-serving university in South Texas. Another Hispanic woman student continues in our group working on the same ideas first investigated through this project. The research has informed the PIs classroom teaching by providing subject matter and infrastructure for student projects. This EAGER grant has allowed the PI to develop more full proposals on microarchitectural prediction, one of which has recently been funded by NSF.
Last Modified: 12/10/2019
Modified by: Daniel A Jimenez
Please report errors in award information by writing to: awardsearch@nsf.gov.
