Intellectual Merit

This research effort has developed a wafer-scalable method of growing graphene suitable for a variety of industries including the electronic and semiconducting industries. The growth method is an outcome of research into understanding the copper microstructure which serves as the catalyst for graphene synthesis. The uniformity in terms of areal coverage is greater than 90% for monolayers. The copper microstructure was optimized in terms of grain size, interfaces, surface smoothness and temperature stability. In addition, hydrogen gas was found to be critical for obtaining monolayer graphene with negligible defects. Subsequently, a variety of transfer schemes were developed to integrate graphene onto insulating substrates for device and sensor studies. Using a mechanical delamination transfer approach we found that graphene/copper or copper/silicon oxide delamination paths could be selected by slow and faster separation rates, respectively. The resulting transferred graphene showed three to four orders of magnitude reduced copper contamination than standard wet chemical transfer methods. In addition, it was determined that the electrical performance of graphene obtained by the dry peeling method was superior to graphene obtained by standard wet-transfer methods. Finally, high-performance transistors boasting high-mobility, symmetric electron and hole conduction, and circuits operating at GHz speeds were achieved. By integrating graphene with commercial Si chips, we were able to realize and demonstrate gas sensors using graphene as the sensor material and Si circuits for read-out. This represents the first monolithic demonstration of working nanosystem featuring graphene and silicon.   

Broader Impact

In a general sense, synthesis of graphene on standard si-based wafers and integration of graphene with Si for hybrid nanotechnology is widely considered among the greatest prospects for transitioning graphene research from academic laboratories to practical consumer and industrial products. This hybrid nanotechnology can benefit from the maturity and complexity of silicon electronics while taking advantage of the outstanding electronic, mechanical, optical, thermal and sensor properties of graphene to realize advanced devices on semiconductor chips. This research effort has developed a wafer-scalable growth of graphene that has been successfully scaled from 100mm to industry-grade 300mm wafers. Using our dry transfer method, clean graphene can be integrated onto si chips with metal contamination levels that are compliant with semiconductor industry requirements. The synthesized graphene was successfully integrated with Si chips monolithically to demonstrate the first hybrid nanosystem for gas sensor purposes. The synthesis and integration methods developed in this work for graphene is expected to be applicable to other emerging two-dimensional materials including hexagonal boron nitride and transitional metal dichalcogenides, and enable novel applications that can benefit the broader society.

Last Modified: 03/13/2017
Modified by: Deji Akinwande