The computing industry is at a cross-roads today because scaling of silicon technology, which has been a major driving force for enabling high-performance computing, is rapidly approaching the fundamental limits. As Gordon Moore recently noted, “No exponential is forever, but can be only delayed.” On the other hand, the potentials of new emerging technologies are yet to be explored and these technologies are not mature enough to be economically used for mass production of computing devices. From an architecture point of view, a heterogeneous computing system comprised of heterogeneous processors such as CPU, GPU, and accelerators has emerged as a plausible practical solution to meet increasing performance demand under power, thermal, and bandwidth constraints.

Faced with such challenges and opportunities, in this project we aim to dramatically improve performance and energy-efficiency of heterogeneous computing systems with various techniques cutting across multiple levels of computing stacks (i.e., device, circuit, architecture, and runtime algorithm). Toward this goal, we first developed an architectural simulator to evaluate the performance of heterogeneous computing systems and released the simulator to the public (http://cpu-gpu-sim.ece.wisc.edu). Second, we developed a model that can evaluate the energy consumption of GPUs, which is an integral component of heterogeneous computing systems with two other collaborators from the University of Texas and University of British Columbia, and released it to the public (http://www.gpgpu-sim.org/gpuwattch). This energy model is currently the de facto model to evaluate the energy consumption of GPUs and the widely used model in the world, benefiting many researchers around the world. According to Google Scholar, more than 200 research papers have used this model. Third, based on these simulator and model we have developed many architecture and runtime algorithms to improve performance and energy efficiency of heterogeneous computing systems. For example, we developed a runtime algorithm that jointly adapts the operating voltage/frequency, the number of cores, and the workload allocated to the CPU and the GPU in a heterogeneous computing system. This algorithm allows us to maximize the performance under a given power constraint. We also developed various architectures that exploit the similarity of values that are processed by GPUs to further improve performance and energy efficiency while exploiting some unique characteristics of emerging applications running on heterogeneous computing systems. Moreover, we explored a practical but innovative heterogeneous computing architecture that moves computations near the memory considering the bandwidth constraint and energy efficiency, as it becomes more expensive to move data from memory to processors than processing data. This recent work, which significantly improves performance and energy consumption compared to traditional heterogeneous computing systems, has been widely cited by many recently published research papers in very a short time period.

Lastly, this project allowed us to support and train graduate students including under-represented ones. They are now working for large companies in the U.S.A. and contributing to developing the next-generation, state-of-the-art computers that will ensure the U.S.A. to maintain the leading position in computing and economy. Besides, the products of this project allowed us to enhance the contents of undergraduate and graduate-level computer architecture courses such that the students can learn state-of-the-art computing technologies and be better prepared for their jobs in industry and academia.

Last Modified: 11/29/2016
Modified by: Nam Sung Kim