Award Abstract # 1253424
CAREER: Centaur: A Bio-inspired Ultra Low-Power Hybrid Embedded Computing Engine Beyond One TeraFlops/Watt

NSF Org: CNS
Division Of Computer and Network Systems
Recipient: UNIVERSITY OF PITTSBURGH - OF THE COMMONWEALTH SYSTEM OF HIGHER EDUCATION
Initial Amendment Date: January 9, 2013
Latest Amendment Date: June 28, 2016
Award Number: 1253424
Award Instrument: Continuing Grant
Program Manager: Marilyn McClure
mmcclure@nsf.gov
 (703)292-5197
CNS
 Division Of Computer and Network Systems
CSE
 Directorate for Computer and Information Science and Engineering
Start Date: June 1, 2013
End Date: July 31, 2017 (Estimated)
Total Intended Award Amount: $450,000.00
Total Awarded Amount to Date: $349,703.00
Funds Obligated to Date: FY 2013 = $70,013.00
FY 2014 = $89,659.00

FY 2015 = $43,678.00

FY 2016 = $0.00
History of Investigator:
  • Yiran Chen (Principal Investigator)
    yiran.chen@duke.edu
Recipient Sponsored Research Office: University of Pittsburgh
4200 FIFTH AVENUE
PITTSBURGH
PA  US  15260-0001
(412)624-7400
Sponsor Congressional District: 12
Primary Place of Performance: University of Pittsburgh
University Club
Pittsburgh
PA  US  15213-2303
Primary Place of Performance
Congressional District:
12
Unique Entity Identifier (UEI): MKAGLD59JRL1
Parent UEI:
NSF Program(s): CSR-Computer Systems Research
Primary Program Source: 01001314DB NSF RESEARCH & RELATED ACTIVIT
01001415DB NSF RESEARCH & RELATED ACTIVIT

01001516DB NSF RESEARCH & RELATED ACTIVIT

01001617DB NSF RESEARCH & RELATED ACTIVIT

01001718DB NSF RESEARCH & RELATED ACTIVIT
Program Reference Code(s): 1045
Program Element Code(s): 735400
Award Agency Code: 4900
Fund Agency Code: 4900
Assistance Listing Number(s): 47.070

ABSTRACT

The objective of the research is to innovate an embedded computing engine named ?Centaur? to achieve ultra-high power efficiency by adopting the bio-inspired computation model and the advanced memristor technology.
Three constituent elements are included to address the major technical obstacles: (1) The power-efficient hybrid computing system that integrates memristor-based synapse network and crossbar structure, targeting the flexible and intensive data processing, respectively. (2) The robust design methodology for Centaur, including the circuit and algorithm enhancements as well as the necessary EDA flow. (3) The integration of Centaur into modern heterogeneous systems and the prototype demonstration. Creative applications of critical importance to nowadays mobile and embedded systems by taking the full advantages of Centaur, including pattern recognition and video and image processing, will be also explored.
The research can benefit the embedded system community by the revolutions in computing architecture and hardware design for functional variety, power-efficiency, and cost. The results can further benefit the semiconductor and neuromorphic societies at large by stimulating the interaction between the advances in device engineering and computing models. The developed techniques will be transferred to mainstream practices under the close collaborations with several industry partners, and directly impact the future embedded systems. The activities in the collaboration also include the tutorials in the major conferences on the technical aspects of the projects and new course development. The educational plan will enhance the existing standard curricula by integrating new modules on emerging memristor-based computing architecture and the relevant neuromorphic computing model.

PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH

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(Showing: 1 - 10 of 11)
A. M. Hassan, C. Yang, C. Liu, H. Li, and Y. Chen "Hybrid Spiking-based Multi-layered Self-learning Neuromorphic System Based On Memristor Crossbar Arrays" Design, Automation & Test in Europe , 2017
A. M. Hassan, H. Li, and Y. Chen "Hardware Implementation of Echo State Networks using Memristor Double Crossbar Arrays" International Joint Conference on Neural Networks , 2017
C. Min, J. Guo, H. Li, and Y. Che "Extending the Lifetime of Object-based NAND Flash Device with STT-RAM/DRAM Hybrid Buffer" Asia and South Pacific Design Automation Conference , 2017 , p.764 10.1109/ASPDAC.2017.7858416
C. Song, B. Liu, C. Liu, H. Li, and Y. Chen "Design Techniques of eNVM-enabled Neuromorphic Computing Systems" International Conference on Computer Design , 2016 , p.674 10.1109/ICCD.2016.7753356
C. Yang, B. Liu, W. Wen, Q. Wu, M. Barnell, H. Li, Y. Chen, and J. Rajendran "Security of Neuromorphic Computing: Thwarting Learning Attacks Using Memristor?s Obsolescence Effect" International Conference on Computer Aided Design , 2016 , p.1 10.1145/2966986.2967074
C. Yang, C. Wu, Y. Chen, H. Li, Q. Wu, and M. Barnell "Security Challenges in Smart Surveillance Systems and the Solutions Based on Emerging Nano-devices" International Conference on Computer Aided Design , 2016 , p.1 10.1145/2966986.2980092
J. Guo, C. Min, T. Cai, and Y. Chen "ObjNandSim: Object-based NAND Flash Device Simulator" IEEE Non-Volatile Memory Systems and Applications Symposium , 2016 , p.1 10.1109/NVMSA.2016.7547179
L. Song, X. Qian, H. Li, and Y. Chen "PipeLayer: A Pipelined ReRAM-Based Accelerator for Deep Learning" International Symposium on High-Performance Computer Architecture , 2017
M. Hu, H. Li, Y. Chen, Q. Wu, G.S. Rose, and R.W. Linderman "Memristor Crossbar-Based Neuromorphic Computing System: A Case Study" IEEE Transactions on Neural Networks and Learning Systems , v.25 , 2014 10.1109/TNNLS.2013.2296777
W. Wen, C. Wu, Y. Wang, K. Nixon, Q. Wu, M. Barnell, H. Li, and Y. Chen "A New Learning Method for Inference Accuracy, Core Occupation, and Performance Co-optimization on TrueNorth Chip" Design Automation Conference , 2016 , p.18 10.1145/2897937.2897968
X. Liu, M. Mao, B. Liu, B. Li, Y. Wang, H. Jiang, M. Barnell, Q. Wu, J. Yang, H. Li, and Y. Chen "Harmonica: A Framework of Heterogeneous Computing Systems with Memristor-based Neuromorphic Computing Accelerators" IEEE Transactions on Circuits and Systems I , v.63 , 2016 , p.617 10.1109/TCSI.2016.2529279
(Showing: 1 - 10 of 11)

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