
NSF Org: |
CCF Division of Computing and Communication Foundations |
Recipient: |
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Initial Amendment Date: | December 28, 2011 |
Latest Amendment Date: | September 4, 2015 |
Award Number: | 1148778 |
Award Instrument: | Continuing Grant |
Program Manager: |
Sankar Basu
sabasu@nsf.gov (703)292-7843 CCF Division of Computing and Communication Foundations CSE Directorate for Computer and Information Science and Engineering |
Start Date: | January 1, 2012 |
End Date: | December 31, 2016 (Estimated) |
Total Intended Award Amount: | $400,000.00 |
Total Awarded Amount to Date: | $400,000.00 |
Funds Obligated to Date: |
FY 2014 = $80,697.00 FY 2015 = $167,124.00 |
History of Investigator: |
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Recipient Sponsored Research Office: |
5000 FORBES AVE PITTSBURGH PA US 15213-3815 (412)268-8746 |
Sponsor Congressional District: |
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Primary Place of Performance: |
5000 Forbes Avenue Pittsburgh PA US 15213-3815 |
Primary Place of
Performance Congressional District: |
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Unique Entity Identifier (UEI): |
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Parent UEI: |
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NSF Program(s): | Software & Hardware Foundation |
Primary Program Source: |
01001415DB NSF RESEARCH & RELATED ACTIVIT 01001516DB NSF RESEARCH & RELATED ACTIVIT |
Program Reference Code(s): |
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Program Element Code(s): |
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Award Agency Code: | 4900 |
Fund Agency Code: | 4900 |
Assistance Listing Number(s): | 47.070 |
ABSTRACT
On-chip embedded memory is a critical component in today?s large-scale integrated systems. This project aims to develop a completely new memory design methodology that is referred to as Maximum-Information Memory System (MIMS). The key idea is to maximize the information density (i.e., the number of information bits per unit area) or information efficiency (i.e., the number of information bits per unit power). Towards this goal, a radically new information theoretical framework will be developed with three critical components: (1) an analytical information model to quantitatively measure the number of information bits stored in a given memory system, (2) a number of different circuit implementation options to achieve maximum-information storage, and (3) a comprehensive study of high-level performance metrics (e.g., signal-to-noise ratio) to demonstrate the efficacy of the proposed MIMS system in real-life signal processing applications. The combination of these research efforts would provide a fundamental infrastructure that facilitates next-generation memory design for nanoscale IC technologies.
The proposed project offers a fundamentally new view of memory design based on information theory. It is expected to yield significant performance improvement for on-chip memory circuits over a broad range of applications, from consumer electronics (e.g., smart phones) to medical instruments (e.g., implantable medical devices). Hence, successful development of the proposed MIMS framework will have both short-term and long-term impacts on U.S. industry and improve U.S. competitiveness in science and technology. In addition, given its broad coverage of multiple science and engineering fields such as statistics, circuits, etc., the proposed project offers a number of unique education and training opportunities for both university students and industrial engineers. It will substantially improve the education infrastructure and generate high-quality researchers and engineers in related fields.
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
On-chip embedded memory, e.g., static random access memory (SRAM), is a critical component in today’s large-scale integrated systems. A memory bit cell is often carefully designed to achieve: (1) nearly zero failure probability, and (2) minimum area and/or power. However, since memory is extremely sensitive to large-scale process variations posed by nanoscale technology and, hence, becomes one of the major bottlenecks for future technology scaling, there is an immediate need to re-think this fundamental design strategy in order to meet today’s manufacturing reality.
This project has developed a completely new memory design methodology that is referred to as Maximum-Information Memory System (MIMS). The key idea is not to maximize the conventional cell density or power efficiency that is measured by the number of bit cells per unit area or power. Instead, we propose to maximize the information density (i.e., the number of information bits per unit area) or information efficiency (i.e., the number of information bits per unit power). We have developed a radically new information theoretical framework for nanoscale memory design by considering the fact that each bit cell can possibly fail due to today’s manufacturing variations.
In particular, a number of new CAD algorithms and design methodologies have been developed, including: (1) an analytical information model to quantitatively measure the number of information bits stored in a given memory system, (2) a number of different circuit implementation options to achieve maximum-information storage, and (3) a comprehensive study of high-level performance metrics (e.g., signal-to-noise ratio) to demonstrate the efficacy of the proposed MIMS system in real-life signal processing applications.
Furthermore, through novel education curricula and web-based dissemination tools, this project has successfully transferred the newly developed techniques to a diverse population of students and engineers, who will lead the creation of future nanoscale integrated systems of all types, from computation, communication, to consumer electronics. At Carnegie Mellon, the MIMS framework proposed in this project has been summarized as a few lectures and incorporated into an online course “18660: Numerical Methods for Engineering Design and Optimization.” The state-of-the-art technologies can be learned by watching lecture videos through a user-friendly online learning environment.
Last Modified: 01/17/2017
Modified by: Xin Li
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