NSF Org:	CCF Division of Computing and Communication Foundations
Recipient:	UNIVERSITY OF TEXAS AT AUSTIN
Initial Amendment Date:	June 16, 2011
Latest Amendment Date:	July 28, 2014
Award Number:	1116955
Award Instrument:	Standard Grant
Program Manager:	Sankar Basu sabasu@nsf.gov  (703)292-7843 CCF  Division of Computing and Communication Foundations CSE  Directorate for Computer and Information Science and Engineering
Start Date:	August 1, 2011
End Date:	August 31, 2015 (Estimated)
Total Intended Award Amount:	$400,000.00
Total Awarded Amount to Date:	$400,000.00
Funds Obligated to Date:	FY 2011 = $400,000.00
History of Investigator:	Michael Orshansky (Principal Investigator) orshansky@mail.utexas.edu Constantine Caramanis (Co-Principal Investigator)
Recipient Sponsored Research Office:	University of Texas at Austin 110 INNER CAMPUS DR AUSTIN TX  US  78712-1139 (512)471-6424
Sponsor Congressional District:	25
Primary Place of Performance:	University of Texas at Austin 110 INNER CAMPUS DR AUSTIN TX  US  78712-1139
Primary Place of Performance Congressional District:	25
Unique Entity Identifier (UEI):	V6AFQPN18437
Parent UEI:
NSF Program(s):	Software & Hardware Foundation
Primary Program Source:	01001112DB NSF RESEARCH & RELATED ACTIVIT
Program Reference Code(s):	7923, 7945
Program Element Code(s):	779800
Award Agency Code:	4900
Fund Agency Code:	4900
Assistance Listing Number(s):	47.070

ABSTRACT

Increasing productivity in the area of analog integrated circuit design requires the development of a new generation of circuit synthesis tools. A major challenge is that continued scaling of transistor dimensions following Moore's Law makes it difficult to describe the physical behavior of transistors in the form suitable for circuit optimization. The work under this proposal will develop a new approach for optimization over approximate descriptions of transistor behavior, which is the only realistic way to capture analog circuit behavior in a manner appropriate for automated synthesis. The approach is based on explicitly modeling the divergence between the exact model and the approximate model. The research will specifically develop: (1) a new analog synthesis framework for model-based optimization over approximate functions that is able to explicitly take into account the distribution of errors between the approximate and exact models to drive optimization to a solution guaranteed to be true with respect to the exact model; (2) a new model-fitting algorithm, tailored for highly-constrained optimization over approximate functions, that will further enhance the ability of the synthesis tool to produce a good solution.

The outcomes of the work under this proposal will lead to increased automation of analog and mixed-signal design, and result in higher design productivity, as well as more power-efficient and cheaper integrated circuits. Thus, this work will help sustain the evolution and growth of semiconductor technology that has had enormous social implications over the last fifty years. The concepts to be developed will also benefit other scientific domains in which optimization using approximate functions is used. The educational component of this proposal aims to combine the active research program and research experience in this field with the creation of an instructional and teaching infrastructure. Specifically, the graduate courses offered by the PIs will incorporate the aspects of design methodologies developed in this research.

PROJECT OUTCOMES REPORT

Disclaimer

This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.

This project has made several contributions towards overcoming the challenges of automating the design of analog integrated circuits. The continued scaling of transistor dimensions following Moore’s Law makes it difficult to describe the physical behavior of transistors in the form suitable for circuit optimization.

We have developed several new approaches for optimization with approximate descriptions of transistor behavior. The central challenge is that functions that are accurate in describing circuit behavior well are not amenable to efficient optimization. Our works leverages recent progress on semidefinite programming (SDP) relaxations of polynomial (non-convex) optimization. Using a general polynomial allows for much more accurate fitting of SPICE data compared to the more restricted functional forms. Recent SDP techniques for convex relaxations of polynomial optimizations are powerful but alone still insufficient: even for small problems, the resulting relaxations are prohibitively high dimensional. We have developed the coupled sparse fitting and optimization flow that allows finding accurate high-order polynomials while keeping the resulting optimization tractable.

Another effective technique we developed uses the sums-of-squares and moment optimization techniques and semidefinite optimization to address the inaccuracy of monomial functions by fitting device models as higher-order monomials, defined as the exponential functions of polynomials in the logarithmic variables.  By the introduction of high-order monomials, the original GP problems become polynomial geometric programming (PolyGP) problems with non-linear and non-convex objective and constraints. Our PolyGP framework allows significant improvements in model accuracy when symbolic performance functions in terms of device models are present. Using SDP-relaxations, we show how to obtain efficient near-optimal global solutions to the resulting PolyGP.

Jointly, the developed techniques allow efficient optimization with a rich class of functional forms found in typical representations of analog integrated circuit behavior.

 

Last Modified: 12/09/2015
Modified by: Michael Orshansky

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