
NSF Org: |
ECCS Division of Electrical, Communications and Cyber Systems |
Recipient: |
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Initial Amendment Date: | August 21, 2013 |
Latest Amendment Date: | August 21, 2013 |
Award Number: | 1348883 |
Award Instrument: | Standard Grant |
Program Manager: |
Jenshan Lin
jenlin@nsf.gov (703)292-7360 ECCS Division of Electrical, Communications and Cyber Systems ENG Directorate for Engineering |
Start Date: | September 1, 2013 |
End Date: | August 31, 2017 (Estimated) |
Total Intended Award Amount: | $299,272.00 |
Total Awarded Amount to Date: | $299,272.00 |
Funds Obligated to Date: |
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History of Investigator: |
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Recipient Sponsored Research Office: |
1850 RESEARCH PARK DR STE 300 DAVIS CA US 95618-6153 (530)754-7700 |
Sponsor Congressional District: |
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Primary Place of Performance: |
CA US 95616-5294 |
Primary Place of
Performance Congressional District: |
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Unique Entity Identifier (UEI): |
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Parent UEI: |
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NSF Program(s): | CCSS-Comms Circuits & Sens Sys |
Primary Program Source: |
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Program Reference Code(s): |
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Program Element Code(s): |
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Award Agency Code: | 4900 |
Fund Agency Code: | 4900 |
Assistance Listing Number(s): | 47.041 |
ABSTRACT
EAGER: High Performance Silicon based Terahertz Front End Circuits for Chip-to-Chip Interconnect
Abstract
Intellectual Merit: The objective of this EAGER proposal is to investigate silicon based terahertz front end circuit design techniques, which will eventually lead to THz interconnects and solve the long-standing interconnect issue. The Chip-to-chip interconnect gap, which is between the ever-increasing bandwidth requirement and the limited number of I/O pins, has been a bottleneck for computer and embedded systems over decades and is getting more and more challenging with the increase of processing speed in advanced technologies. The THz spectrum holds great promise in the chip-to-chip interconnect area due to its ultra-wide bandwidth to support aggregate data rates orders of magnitude higher than existing interconnect capabilities. As the mainstream technologies for computer and embedded systems, silicon processes are the right technologies. However, the disadvantages of silicon processes, such as low supply voltages, large losses, and low cut-off frequencies, demand new design ideas to overcome these shortages. Therefore, this project will investigate two enabling techniques: (1) LO injected Schottky barrier diode (SBD) based mixing with high efficiency regenerative amplification receiving front end design, successfully demonstrated regenerative receiving structure; and (2) high power THz transmitter front end circuits, based on the proven high power generation scheme based on optimum signal conditions and low loss varactor-based modulation method. The circuit design techniques and methodologies are transformative, which can also apply to other high frequency circuits and systems in different processes.
Broader Impacts: The success of silicon based THz front end circuits will eventually lead to THz interconnects, providing orders-of-magnitude better interconnect bandwidth density to address the bottleneck problem from interconnects. Therefore, it will support new computer architecture to meet the fast increasing data rate requirement in BIG DATA era. Furthermore, the successful technology developments will also open tremendous opportunities for a wide variety of important other THz applications by advancing THz technologies with high power, low noise and small form factors. For instance, it can enable portable THz devices for THz medical diagnosis for early disease detection; it can advance pharmaceutical and drug development through THz monitoring devices. These applications will not only advance scientific research, but also greatly benefit our daily lives and societies. The research results will be widely disseminated through international conferences and high impact journals. Both PIs are committed to engaging and retaining students from under-represented groups into engineering areas and will further extend outreach to local K-12 school students.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
Through this sponsored project, we have investigated several techniques to push the performance envelop for both sub-THz/THz transmitters and receivers in silicon technologies. A switching voltage controlled oscillator (VCO) at 190 GHz have been demonstrated, which achieves the record 20.7% of tuning range for the signal generator higher than 150 GHz with maximum output power of -2.1dBm. The harmonic oscillator achieves the maximum second harmonic output power of 5.6 dBm at 215 GHz and DC-to-RF efficiency of 4.6% in TSMC 65 nm CMOS LP process. With the investigated holistic design approach, an fundamental oscillator at 177 GHz has demonstrated the record efficiency of 25.9% with the output power of 0.66 dBm also in 65 nm CMOS technology. Moreover, we have demonstrated the sub-THz interconnect link by including the receiver with the energy efficiency of <1pJ/b and bandwidth density of >30Gbps/mm^2.
Although all the design ideas are demonstrated in silicon processes, the ideas are transformative and can be applied in other technologies. The research outcomes have been pushed the performance envelop for sub-THz and THz circuits and systems. These techniques can not only be applied to THz interconnect, but also enable opportunities for a wide variety of important other applications through the performance advancements, including high power, wide tuning range, high efficiency etc.
Last Modified: 11/09/2017
Modified by: Qun Jane Gu
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