The objective of this project was to explore how advanced inference algorithms from machine learning can be realized at the limits of energy efficiency within programmable platforms, especially for sensing applications. This was done by taking two perspectives. Top-down, architectural approaches were explored whereby full-system pipelines involving inference were studied to analyze computational structure, in terms of data structures involved, programmability requirements, computational intensity, etc. Bottom-up, circuit implementations were studied to analyze energy efficiency and statistical computation models. The approach was then to leverage the two perspectives for circuits, architectures, and algorithms co-design towards generalized design principles for energy-efficient inference.

Top-down, this research led to architectural design principles for programmable heterogeneous processors, based on composable accelerators, addressing the different computations and programmability requirements of varied processing stages within applications. Programmability was a key design objective, as it poses a primary barrier to adopting heterogeneous platforms, despite the substantial energy-efficiency gains they provide. Programmability was explored from two directions. First, the computational stages in an inference system were analyzed to understand the types and ranges of programmability required. This led to insights on where aggressive specialization could be exploited. Second, for stages where programmability is crucial, design alternatives that have potential leverage in inference system were investigated to enable such programmability. For instance, an important consideration was exploiting approximation and statistical computation. This enables computations to be modelled using specific primitives combined in structured ways. Such structure and primitives can accordingly be exploited towards high levels of hardware specialization. The research insights were demonstrated experimentally through custom programmable heterogeneous CMOS microprocessors, to which full applications (primarily related to medical sensors) were mapped. This enabled characterization of energy efficiency and programmability.

Bottom-up, this research led to algorithms for realizing inference based on computations that can be efficiently implemented from the physics of the technological fabric, and realization of unconventional system components based on this. With regards to algorithms, two approaches were developed: (1) Data-Driven Hardware Resilience (DDHR); and (2) Error-Adaptive Classifier Boosting (EACB). DDHR exploits data-driven learning of model parameters in a classifier following a feature-extraction stage, to enable adaptation to output statistics arising from non-ideal circuit behavior (variations, nonlinearity). EACB, enables adaptation to statistics arising from non-ideal circuit behavior within the classifier stage itself, by leveraging iterative parameter-learning algorithms (e.g., Adaptive Boosting, Stochastic Gradient Descent). These approaches were demonstrated on a number of block-level realization explicitly pushing circuits to energy aggressive design points, where statistical non-idealities become prominent. The blocks included: (1) in-memory classifiers, to overcome the memory wall; (2) analog-to-feature converters, to directly acquire signal features required for inference; (3) approximate digital accelerators, employing structured models of computation for high accelerator specialization. All of the blocks were demonstrated experimentally through custom CMOS prototypes and Large-Area Electronics prototypes for large-scale sensing systems.

Finally, insights from the top-down and bottom-up research were combined towards highly-programmable heterogenous architectures, incorporating unconventional energy aggressive accelerators. Most notably, the research led to a microprocessor integrating programmable and bit-configurable in-memory computing with near-memory digital accelerator and embedded CPU. Software libraries and mapping algorithms are currently being researched for such platforms.         

Last Modified: 08/02/2019
Modified by: Naveen Verma