| NSF Org: |
CNS Division Of Computer and Network Systems |
| Recipient: |
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| Initial Amendment Date: | August 23, 2012 |
| Latest Amendment Date: | August 23, 2012 |
| Award Number: | 1218695 |
| Award Instrument: | Standard Grant |
| Program Manager: |
Marilyn McClure
mmcclure@nsf.gov (703)292-5197 CNS Division Of Computer and Network Systems CSE Directorate for Computer and Information Science and Engineering |
| Start Date: | September 1, 2012 |
| End Date: | August 31, 2016 (Estimated) |
| Total Intended Award Amount: | $400,000.00 |
| Total Awarded Amount to Date: | $400,000.00 |
| Funds Obligated to Date: |
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| History of Investigator: |
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| Recipient Sponsored Research Office: |
1960 KENNY RD COLUMBUS OH US 43210-1016 (614)688-8735 |
| Sponsor Congressional District: |
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| Primary Place of Performance: |
OH US 43210-1063 |
| Primary Place of
Performance Congressional District: |
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| Unique Entity Identifier (UEI): |
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| Parent UEI: |
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| NSF Program(s): | CSR-Computer Systems Research |
| Primary Program Source: |
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| Program Reference Code(s): |
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| Program Element Code(s): |
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| Award Agency Code: | 4900 |
| Fund Agency Code: | 4900 |
| Assistance Listing Number(s): | 47.070 |
ABSTRACT
Now that computer technology appears to have reached the limit of Dennard scaling (increasing clock rates), software must become more parallel, to scale with hardware that provides more instead of faster cores. However, writing correct, scalable shared-memory concurrent programs is notoriously difficult. Transactional memory (TM) offers potential improvements over conventional shared-memory systems in programmability, reliability, and scalability. However, it has not lived up to its initial promise, primarily because no one has shown how to make it practical. Hardware manufacturers are reluctant to build hardware TM (HTM) into already-complex cache and memory subsystems, and software TM (STM) suffers from poor performance and weak semantics. This project seeks to advance the state of the art dramatically by investigating new research directions for making STM truly practical, by achieving high performance with strong semantics. The project tackles STM's key cost in existing work -- detecting and handling conflicting accesses -- using a novel mechanism that avoids synchronization at non-conflicting accesses.
Direct beneficial impacts of making widely available practical STM support include the ability to produce more reliable and scalable software systems, leading to advances in software for safety- and mission-critical systems. Widespread use of STM can help spur commercial development of hardware support for hybrid hardware-software TM, which requires practical STM support. The investigator's engagement with industrial researchers provides an avenue to enhance dissemination. Public distribution of STM implementations produced by this project provides a basis for further research and development. Several educational and outreach activities, including course projects, enhanced core course material, interactive presentations for a summer bridge program targeting minority undergraduate engineering majors, and recruiting events for prospective minority graduate students, aim to train a diverse group of programmers and researchers in developing future reliable, scalable software systems.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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PROJECT OUTCOMES REPORT
Disclaimer
This Project Outcomes Report for the General Public is displayed verbatim as submitted by the Principal Investigator (PI) for this award. Any opinions, findings, and conclusions or recommendations expressed in this Report are those of the PI and do not necessarily reflect the views of the National Science Foundation; NSF has not approved or endorsed its content.
Now that computer technology appears to have reached the limit of Dennard scaling (increasing clock rates), software must become more parallel, to scale with hardware that provides more instead of faster cores. However, writing correct, scalable shared-memory concurrent programs is notoriously difficult. Transactional memory (TM) offers potential improvements over conventional shared-memory systems in programmability, reliability, and scalability. However, it has not lived up to its initial promise, primarily because no one has shown how to make it practical. Hardware manufacturers are reluctant to build unbounded hardware TM (HTM) into already-complex cache and memory subsystems, and software TM (STM) suffers from poor performance and weak semantics. This project seeks to advance the state of the art dramatically by investigating new research directions for making STM truly practical, by achieving high performance with strong semantics. The project aims to not only advance STM but also develop runtime support that is applicable to providing strong semantic guarantees, both for transactional and non-transactional shared-memory programs.
The project provides the following contributions. (1) It develops a novel STM called LarkTM that has low overhead, tunable scalability, and strong semantic guarantees. (2) It demonstrates how to exploit asynchrony to enhance STM and other software systems that provide atomicity and determinism guarantees. (3) The project introduces support for a memory model based on snapshot isolation of synchronization-free regions, in order to balance efficiency and semantic guarantees with availability. (4) It introduces novel analyses that detect data races -- which are a key source of errors in software systems -- that are efficient enough for always-on use in production systems. Each of these contributions advances the state of the art, by providing runtime support on commodity systems with better performance than existing work.
Broader impacts of the project include the ability to produce more reliable and scalable software systems, leading to advances in software for safety- and mission-critical systems. The project's software implementations are publicly available, providing a basis for further research and development. Mentoring, educational, and outreach activities have helped to train a diverse group of computer science students and researchers in developing future reliable, scalable software systems.
Last Modified: 11/22/2016
Modified by: Michael Bond
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