
NSF Org: |
CCF Division of Computing and Communication Foundations |
Recipient: |
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Initial Amendment Date: | July 22, 2008 |
Latest Amendment Date: | June 2, 2009 |
Award Number: | 0811781 |
Award Instrument: | Standard Grant |
Program Manager: |
Almadena Chtchelkanova
achtchel@nsf.gov (703)292-7498 CCF Division of Computing and Communication Foundations CSE Directorate for Computer and Information Science and Engineering |
Start Date: | August 1, 2008 |
End Date: | July 31, 2012 (Estimated) |
Total Intended Award Amount: | $500,000.00 |
Total Awarded Amount to Date: | $516,000.00 |
Funds Obligated to Date: |
FY 2009 = $16,000.00 |
History of Investigator: |
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Recipient Sponsored Research Office: |
1960 KENNY RD Columbus OH US 43210-1016 (614)688-8734 |
Sponsor Congressional District: |
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Primary Place of Performance: |
1960 KENNY RD COLUMBUS OH US 43210-1016 |
Primary Place of
Performance Congressional District: |
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Unique Entity Identifier (UEI): |
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Parent UEI: |
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NSF Program(s): |
COMPILERS, Software & Hardware Foundation |
Primary Program Source: |
01000910DB NSF RESEARCH & RELATED ACTIVIT |
Program Reference Code(s): |
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Program Element Code(s): |
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Award Agency Code: | 4900 |
Fund Agency Code: | 4900 |
Assistance Listing Number(s): | 47.070 |
ABSTRACT
The ubiquity of multi-core processors has brought parallel computing squarely into the mainstream. It is now essential to develop parallel implementations of a large number of existing sequential codes. The difficulty of programming these architectures to effectively tap the potential of multiple on-chip processing units is a significant challenge. Although there has been significant progress in compiler techniques towards automatic parallelization, the current state-of-practice leaves much to be desired. The pressing need for systematic, general, and effective theoretical foundations for such efforts is a major motivation for this project.
This project will build on some very recent developments using polyhedral models showing great promise for developing effective automatic parallelization frameworks for multi-core architectures.
With the polyhedral model, it is possible to reason about the correctness of complex loop transformations in a completely mathematical setting using powerful machinery from linear algebra and linear programming. This enables effective integrated transformation, and therefore can be the basis for developing a very powerful automatic parallelization framework that can target different multi-core platforms. The project will address a number of key issues that are very important in developing an automatic parallelization and data locality optimization framework that is effective over a range of user application codes: (i) model-driven search for determination of effective tile sizes and loop fusion choices; (ii) extended tiling approaches like overlapped/split tiles to enhance concurrency; (iii) automatic generation of parallel code for accelerators with multiple distinct address spaces; and (iv) development of an extensive benchmark suite for assessment of automatic parallelization systems.
The developed software will be made publicly available.
PUBLICATIONS PRODUCED AS A RESULT OF THIS RESEARCH
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